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公开(公告)号：US20200241369A1
公开(公告)日：2020-07-30
申请号：US15769640
申请日：2017-08-07
发明人： Duolong DING , Huafeng LIU , Shengwei ZHAO , Chaochao SUN , Chao WANG , Jingping LV , Meng YANG , Lei YANG , Chongliang HU , Lin XIE , Bule SHUN , Shimin SUN
IPC分类号： G02F1/1362
摘要： A pixel structure and a manufacturing method thereof, an array substrate and a display device are provided. The pixel structure includes: a signal line; a common electrode line an extension direction of which is same as an extension direction of the signal line; a transistor including a semiconductor layer which includes a source region and a drain region; a first storage electrode which is insulated from the common electrode line and is connected with the drain region of the semiconductor layer; and a second storage electrode which is connected with the common electrode line and is insulated from the first storage electrode. In the pixel structure, portions, between the signal line and the common electrode line, of the first storage electrode and the second storage electrode includes overlap with each other to form a first storage capacitance.
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2.发明申请公开(公告)号：US20170329163A1
公开(公告)日：2017-11-16
申请号：US15521471
申请日：2015-12-31
发明人： Lulu YE , Huafeng LIU , Jingping LV , Lei YANG , Meng YANG , Kai ZHANG , Chao WANG , Chaochao SUN , Shengwei ZHAO
IPC分类号： G02F1/1368 , H01L27/32 , H01L27/12 , H01L21/77 , G02F1/1362 , G02F1/1343
CPC分类号： G02F1/1368 , G02F1/134363 , G02F1/136227 , H01L21/77 , H01L27/124 , H01L27/32 , H01L27/3244 , H01L27/3262
摘要： Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.
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3.发明申请公开(公告)号：US20210376057A1
公开(公告)日：2021-12-02
申请号：US16648421
申请日：2019-04-25
发明人： Huafeng LIU , Shengwei ZHAO , Chaochao SUN , Chao WANG , Jingping LV , Lin XIE , Guoqing ZHOU , Panpan ZHANG , Tengfei WANG , Hsinghua PAN , Lele LI , Zhiqiang CHANG , Shaocong DANG , Shijie MU , Zhen WANG
摘要： Disclosed are a display substrate, a display device, a manufacturing method and a repairing method. A capacitor structure in the display substrate includes a first electrode and a second electrode. The first electrode includes a first main body portion extending in a first direction, first branch portions extending in a second direction, and a first connection portion connecting the first branch portions to the first main body portion. The second electrode includes a second main body portion extending in the first direction, second branch portions extending in the second direction, and a second connection portion connecting the second branch portions to the second main body portion. One side of the first electrode having the first branch portions faces one side of the second electrode having the second branch portions, and each first branch portion and a corresponding second branch portion form a capacitor.
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公开(公告)号：US20170205953A1
公开(公告)日：2017-07-20
申请号：US15233408
申请日：2016-08-10
发明人： Chaochao SUN , Huafeng LIU , Shengwei ZHAO , Kai ZHANG , Lei YANG , Lulu YE , Jingping LV , Chao WANG , Chongliang HU , Meng YANG , Duolong DING , Bule SHUN , Lin XIE , Yao LI , Shimin SUN
IPC分类号： G06F3/041 , G02F1/1362 , G09G3/36 , H01L27/12 , G06F3/044
摘要： The present disclosure provides an array substrate, its driving method and manufacturing method, and a display device. The array substrate includes a transistor layer arranged on a base, and a first transparent conductive layer, a first insulation layer, a second transparent conductive layer, a second insulation layer and a third transparent conductive layer sequentially arranged on the transistor layer. The first transparent conductive layer covers the transistor layer at a display area, the second transparent conductive layer includes a pattern of touch electrodes, and the third transparent conductive layer includes a pattern of pixel electrodes. Within any pixel area of the display area, the pixel electrode is connected to a pixel electrode connection end of the transistor layer through a via-hole in the first insulation layer and the second insulation layer, and the first transparent conductive layer is provided with an opening at a position corresponding to the via-hole.
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