Driving method and driving circuit for backlight, backlight and display apparatus

    公开(公告)号:US11455963B2

    公开(公告)日:2022-09-27

    申请号:US16320707

    申请日:2018-04-24

    Abstract: A driving method for a backlight is provided. The backlight includes a plurality of light-emitting elements, and the driving method includes steps of calculating a brightness difference value of an image to be displayed; and determining whether the brightness difference value of the image to be displayed is greater than a predetermined difference value of the image. When the brightness difference value of the image to be displayed is determined to be greater than the predetermined difference value of the image, the method includes steps of dividing the image to be displayed into a plurality of sub-regions; partitioning the backlight according to brightness difference values of the plurality of sub-regions to obtain a plurality of final light-emitting regions of the backlight; and driving the backlight to emit light according to the plurality of final light-emitting regions. The present disclosure further provides a driving circuit, a backlight and a display device.

    Data compensation method and apparatus for liquid crystal display screen

    公开(公告)号:US10768455B2

    公开(公告)日:2020-09-08

    申请号:US15743255

    申请日:2017-07-21

    Abstract: A data compensation method and apparatus for a liquid crystal display screen are described herein. Said method comprises determining a timing length ΔT′ from the last turn-off of the liquid crystal display screen upon turn-on of the liquid crystal display screen, and determining a mura data compensation table am called at the time of the last turn-off; determining a mura data compensation table to be called at the time of the present turn-on according to a pre-set time length T needed for stabilization of mura, mura data compensation tables corresponding to pre-set different time periods, said timing length ΔT′, and said mura data compensation table am; performing data compensation starting from the determined mura data compensation table to be called at the time of the present turn-on. By using said method for data compensation, an appropriate initial data compensation table can be determined to obtain a better compensation effect.

    Frequency signal generating system and display device
    7.
    发明授权
    Frequency signal generating system and display device 有权
    频率信号发生系统和显示装置

    公开(公告)号:US09425810B2

    公开(公告)日:2016-08-23

    申请号:US14361405

    申请日:2013-12-20

    CPC classification number: H03L7/18 H03L7/0992 H03L7/183 H03L7/193

    Abstract: A frequency signal generating system comprises a digital phase-locked loop for receiving a source frequency signal; a loop filter for filtering out high frequency components of a signal output from the digital phase-locked loop; and a voltage controlled oscillator for outputting a target frequency signal according to a signal from the loop filter, wherein an output terminal of the voltage controlled oscillator is connected to a first output terminal of the digital phase-locked loop so that the target frequency signal output from the voltage controlled oscillator is fed back to the digital phase-locked loop, the digital phase-locked loop performs frequency-dividing and phase-detecting on the source frequency signal and the fed back target frequency signal so that the target frequency signal output from the voltage controlled oscillator and the source frequency signal satisfy a definite mathematical relationship therebetween.

    Abstract translation: 频率信号发生系统包括用于接收源频率信号的数字锁相环; 用于滤除从数字锁相环输出的信号的高频分量的环路滤波器; 以及压控振荡器,用于根据来自环路滤波器的信号输出目标频率信号,其中压控振荡器的输出端连接到数字锁相环的第一输出端,​​使得目标频率信号输出 从压控振荡器反馈到数字锁相环,数字锁相环对源极频率信号和反馈目标频率信号进行分频和相位检测,使得目标频率信号从 压控振荡器和源极频率信号之间具有确定的数学关系。

    Integrated circuit board and display apparatus

    公开(公告)号:US10311827B2

    公开(公告)日:2019-06-04

    申请号:US14761753

    申请日:2014-09-30

    Abstract: There is provided an IC board and a display apparatus. Switching components (01; 02) are added between the internal interfaces (J1, J2 . . . Jn; j1, j2 . . . jn) corresponding to the backend data processing chips (U2; U3) and the frontend data processing chip (U1), or a switching component (02) is added between the internal interfaces (j1, j2 . . . jn) corresponding to the backend data processing chip (U2) and another backend data processing chip (U3). The switching components (01; 02) can ensure normal signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U2) when no external test signal is input into the internal interfaces, i.e., when the IC board operates normally; and interrupt the signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U3) when the internal interfaces j1, j2 . . . jn are input with an external test signal such that the impedance of the signal transmission path in the backend data processing chips (U2; U3) during the external testing remains consistent to avoid abnormal transmission of the external test signals and the signals during normal operation.

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