Abstract:
The present disclosure provides a shift register, a gate driving circuit and a display panel, and belongs to the field of display technology. The shift register of the present disclosure includes: an input circuit configured to precharge and reset a pull-up node; one pull-down control circuit being electrically connected to one pull-down circuit through a pull-down node; the pull-down control circuit being configured to control a potential at the pull-down node under a first power voltage; each pull-down circuit being configured to pull down the potential at the pull-down node in response to a potential at the pull-up node; an output circuit configured to output a clock signal through a signal output terminal in response to the potential at the pull-up node; one first noise reduction circuit connected to one pull-down node.
Abstract:
A shift register includes: an input circuit configured to, under control of an input signal transmitted by an input signal terminal, transmit the input signal to a pull-up node; a first control circuit configured to, under control of a first voltage signal transmitted by a first voltage signal terminal, transmit the first voltage signal to a first pull-down node, and under control of a voltage of the pull-up node, transmit a second voltage signal received at a second voltage signal terminal to the first pull-down node; and an output circuit configured to transmit a clock signal received at a clock signal terminal to a first output signal terminal under the control of the voltage of the pull-up node. The first control circuit is further configured to, receive the input signal, and transmit the second voltage signal to the first pull-down node under the control of the input signal.
Abstract:
The present invention provides an in-cell touch screen and a drive method thereof. The in-cell touch screen comprises a first substrate and a first electrode layer provided above the first substrate, wherein, the first electrode layer comprises touch control drive electrodes, touch control sensing electrodes and touch control amplification electrodes, which are mutually insulated, the touch control amplification electrodes are provided in a gap between the touch control drive electrodes and the touch control sensing electrodes, during a display phase, at least the touch control drive electrodes and the touch control sensing electrodes are applied with a common voltage, and during a touch control phase, the touch control drive electrodes are applied with a touch control drive signal, and the touch control sensing electrodes output touch control sensing signals.
Abstract:
An array substrate includes a base substrate, including a display area and a peripheral area; a driving circuit layer, located at one side of the base substrate and including a plurality of data lines and a plurality of scanning lines, where the plurality of data lines extend along a first direction and are arranged at intervals along a second direction, the plurality of scanning lines extend along the second direction and are arranged at intervals along the first direction, and the data line and the scanning line intersect with each other to define a plurality of sub-pixel areas; and a metal layer, located at one side of the driving circuit layer away from the base substrate, where the metal layer includes a plurality of metal blocks arranged at intervals, and the metal block is located at an intersection of the data line and the scanning line.
Abstract:
Provided in the embodiments are a transfer structure and a manufacturing method thereof, and a transfer device and a manufacturing method thereof. The transfer structure includes: a first electrode, a piezoelectric layer, a second electrode and an adhesive layer stacked on a substrate in sequence, wherein the first electrode and the second electrode are insulated from each other. The transfer structure further includes: a position-limiting layer, wherein the position-limiting layer includes a cavity; the piezoelectric layer and at least part of the adhesive layer are located in the cavity of the position-limiting layer; and in the direction perpendicular to the substrate, the distance between the surface, away from the substrate, of the position-limiting layer and the substrate is greater than the distance between the surface, away from the substrate, of the adhesive layer and the substrate.
Abstract:
A shift register circuit includes a pull-up control sub-circuit, a pull-up sub-circuit and a shutdown auxiliary sub-circuit. The pull-up control sub-circuit is configured to transmit a voltage from the signal input terminal to the pull-up node under the control of the voltage from the signal input terminal. The shut-down auxiliary sub-circuit is configured to pull down a voltage of the pull-up node to a voltage of the discharge voltage terminal under the control of a voltage from the pull-up node. The pull-up sub-circuit is configured to transmit a voltage from the clock signal terminal to the first signal output terminal under the control of a voltage from the pull-up node. The first signal output terminal is configured to be connected to a gate line.
Abstract:
Provided are a shift register and a gate driving device on array substrate for eliminating noise at an output terminal of the shift register and improving the operating stability thereof. The shift register comprises an input module for supplying an input signal to a pull-up node, wherein the pull-up node serves as an output node of the input module; a pull-up module for storing the input signal and supplies a first clock signal to the output terminal; a reset module for supplying a negative voltage of a power supply to the pull-up node; a first pull-down control module for supplying the negative voltage to a first pull-down node; a second pull-down control module for supplying the negative voltage to a second pull-down node; and a pull-down module for supplying the negative voltage to the pull-up node, and for supplying the negative voltage to the output terminal.
Abstract:
There is provided a display panel including: a light guide structure layer having a light exiting side and configured to enable internal light to be emitted from a preset position; a display structure layer on the light exiting side and including a light adjusting structure, a black matrix and a reflection matrix positioned on a side, away from the light guide structure layer, of the light adjusting structure, the light adjusting structure is configured to control light emitted from the preset position to enter an area where the black matrix is positioned and/or an area where the reflection matrix is positioned; a light absorption structure layer on a side of the light adjusting structure away from the black matrix and configured to absorb light reflected by the black matrix and allow light reflected by the reflection matrix to pass through. A display device is further provided.
Abstract:
The disclosure relates to a shift register, a method for driving the same, an array substrate and a display apparatus, for reducing the wiring space as required by the shift register. The shift register comprising a control unit and a plurality of output sub-units, wherein the control unit comprises a plurality of output terminals which output gate line control signals sequentially according to the control timing sequence during a first preset time period, and output the gate line control signals sequentially according to the control timing sequence during a second preset time period in an order opposite to or identical to an order in which the gate line control signals are output during the first preset time period; each of the output sub-units is connected to a corresponding output terminal of the control unit, and divides the gate line control signal output from the connected output terminal into at least a first gate line control signal and a second gate line control signal, and outputs the first gate line control signal and the second gate line control signal respectively.
Abstract:
The embodiment of the present disclosure provides a display substrate including a plurality of gate lines and a plurality of data lines. The plurality of gate lines each extend along a first direction, and the plurality of data lines each extend along a second direction. The plurality of data lines are spatially crossed with the plurality of gate lines to define a plurality of pixel regions, and at least one sub-pixel is provided in each of the plurality of pixel regions. At least three sub-pixels adjacent to each other along the second direction form one of a plurality of pixels. All the sub-pixels within one of the plurality of pixels are coupled to a same data line of the plurality of data lines.