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    Track and hold system
    2.
    发明授权
    Track and hold system 失效
    跟踪和保持系统

    公开(公告)号：US3694668A

    公开(公告)日：1972-09-26

    申请号：US3694668D

    申请日：1970-01-02

    Applicant: BUNKER RAMO

    Inventor： FOERSTER ROY P

    IPC: G11C27/00 ,  G11C27/02 ,  H03K5/08

    CPC classification number: G11C27/00 ,  G11C27/026

    Abstract: A system for enabling a capacitor to track an analog input signal and hold the signal level, on command. The system includes a high speed operation amplifier having first and second independent and selectable pairs of differential inputs. The amplifier output is connected through a pair of diodes connected in inverse parallel to the capacitor. Feedback means couple the capacitor to one pair of inputs in the track mode in a manner such that the high amplifier gain compensates for nonlinearities and offset effects to enable the capacitor to precisely track the input signal. In the hold mode, the other pair of inputs is selected to enable the amplifier to act as a unity gain voltage follower providing an output substantially equal to the capacitor voltage and insufficient to exceed the forward threshold of the diodes.

    Abstract translation: 一种用于使能电容器跟踪模拟输入信号并保持信号电平的系统。 该系统包括具有第一和第二独立且可选择的差分输入对的高速运算放大器。 放大器输出通过与电容器反向并联连接的一对二极管连接。 反馈意味着将电容器耦合到轨道模式中的一对输入，使得高放大器增益补偿非线性和偏移效应，以使电容器能够精确跟踪输入信号。 在保持模式下，选择另一对输入，以使放大器能够充当单位增益电压跟随器，提供基本上等于电容器电压的输出，并且不足以超过二极管的正向阈值。

    Analog-to-digital converter
    3.
    发明授权
    Analog-to-digital converter 失效

    公开(公告)号：US3614777A

    公开(公告)日：1971-10-19

    申请号：US3614777D

    申请日：1969-06-09

    Applicant: BUNKER RAMO

    Inventor： FOERSTER ROY P

    IPC: H03M1/00 ,  H03K13/06

    CPC classification number: H03M1/44

    Abstract: A converter system employing clock controlled data propagation for rapidly converting analog input signals to ''''reflected binary'''' or Gray code output signals. The system is comprised of a plurality of substantially identical stages, each capable of providing both a bit output signal and a residual analog output signal in response to an analog input signal. Each stage alternately operates in an ''''acquisition'''' mode in which the input portion of the stage slews to, and tracks, the stage input voltage and a ''''hold'''' mode in which the stage input portion stops tracking and holds constant at the level of the input signal immediately prior to the start of the hold command. The stages are interconnected in a manner which permits each stage to start converting a subsequent analog input signal promptly after it forms its bit with respect to the preceding analog input signal and prior to propagation of the preceding analog input signal through all of the stages.

    Power supply system
    6.
    发明授权
    Power supply system 失效

    公开(公告)号：US3600598A

    公开(公告)日：1971-08-17

    申请号：US3600598D

    申请日：1969-08-11

    Applicant: BUNKER RAMO

    Inventor： FOERSTER ROY P

    IPC: H02J3/36 ,  H02J1/00

    CPC classification number: H02J3/36 ,  Y02E60/60 ,  Y10T307/313 ,  Y10T307/383 ,  Y10T307/505

    Abstract: An electrical power supply system for efficiently supplying power at multiple voltage levels to various loads. The system includes transformer means intercoupling a plurality of different voltage levels so as to automatically translate or redistribute power as load conditions change. For example, as load current directions change, power is translated with minimum loss from levels acting as a current sink to levels requiring a current source.

    Fusible link matrix for programmable networks
    9.
    发明授权
    Fusible link matrix for programmable networks 失效
    可编程网络的可靠链接矩阵

    公开(公告)号：US3656115A

    公开(公告)日：1972-04-11

    申请号：US3656115D

    申请日：1971-04-19

    Applicant: BUNKER RAMO

    Inventor： FOERSTER ROY P

    IPC: H01C17/23 ,  H03K19/08 ,  H04Q9/00

    CPC classification number: H03K19/0813 ,  H01C17/23

    Abstract: A fusible link matrix is provided to enable a parameter (e.g., resistance) of a module to be adjusted, without requiring physical access to the components thereof, by selectively fusing (opening or closing) links of the matrix through an addressing bus. Decoupling diodes between the fusible links and lines of the bus prevent sneak current paths.

    Abstract translation: 通过选择性地通过寻址总线选择性地熔合（打开或关闭）矩阵的链接，提供可熔链接矩阵以使模块的参数（例如电阻）能够被调整，而不需要物理地访问其组件。 可熔链路和总线线路之间的去耦二极管防止潜行电流路径。

    Analog-to-digital converter
    10.
    发明授权
    Analog-to-digital converter 失效

    公开(公告)号：US3577139A

    公开(公告)日：1971-05-04

    申请号：US3577139D

    申请日：1967-06-12

    Applicant: BUNKER RAMO

    Inventor： FOERSTER ROY P

    IPC: H03M1/00 ,  H03K13/02

    CPC classification number: H03M1/00 ,  H03M1/08

    Abstract: A converter responsive to analog input signals for providing ''''reflected binary'''' or Gray code output signals. The converter is comprised of a plurality of substantially identical stages connected in cascade. Each stage provides both a digital output signal and a residual analog output signal in response to an analog input signal applied thereto. The level of the residual output signal provided by each stage is determined by a V-shaped transfer characteristic defined by a differential amplifier therein. The residual output signal from each stage constitutes the input signal to a subsequent stage.

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