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    Scheduling techniques for data cells in a data switch
    1.
    发明授权
    Scheduling techniques for data cells in a data switch 失效
    数据交换机中数据单元的调度技术

    公开(公告)号：US07002978B2

    公开(公告)日：2006-02-21

    申请号：US09780054

    申请日：2001-02-09

    申请人： Bidyut Parruck ,  Chetan V. Sanghvi ,  Vinay Kumar Bhasin ,  Makarand Dharmapurikar ,  Uday Govind Joshi

    发明人： Bidyut Parruck ,  Chetan V. Sanghvi ,  Vinay Kumar Bhasin ,  Makarand Dharmapurikar ,  Uday Govind Joshi

    IPC分类号： H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/1553 ,  H04L49/1576 ,  H04L2012/5635 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04L2012/5683

    摘要： A computer-implemented method for scheduling cells output on an output path of a data switch. The data switch is configured for switching the cells from a plurality of input paths to the output path. The method includes providing a plurality of queues, each queue of the plurality of queues having an assigned weight, respective ones of the plurality of input paths being coupled to respective ones of the plurality of queues. The method further includes providing a plurality of queues of queues. The plurality of queues being coupled to the plurality of queues of queues with queues of the plurality of queues having a similar weight being coupled a same queue of queues of the plurality of queues of queues. There is further included providing a scheduler, the plurality of queues of queues being input into the scheduler, the scheduler being coupled to the output path.

    摘要翻译： 一种用于在数据交换机的输出路径上调度小区输出的计算机实现的方法。 数据开关被配置用于将单元从多个输入路径切换到输出路径。 所述方法包括提供多个队列，所述多个队列中的每个队列具有分配权重，所述多个输入路径中的相应输入路径被耦合到所述多个队列中的相应队列。 该方法还包括提供多个队列队列。 多个队列被耦合到队列的多个队列，其中具有相似权重的多个队列的队列被耦合在队列的多个队列的相同队列中。 还包括提供调度器，多个队列队列被输入到调度器中，调度器被耦合到输出路径。

    Method for managing and controlling the low power modes for an integrated circuit device
    4.
    发明授权
    Method for managing and controlling the low power modes for an integrated circuit device 有权
    用于管理和控制集成电路器件的低功率模式的方法

    公开(公告)号：US08909956B2

    公开(公告)日：2014-12-09

    申请号：US12813265

    申请日：2010-06-10

    申请人： Zhiqing Zhuang ,  Vinay Kumar Bhasin ,  Lawrence John Madar, III ,  Chenmin Zhang ,  Vafa James Rakshani ,  Soheyla Kamal

    发明人： Zhiqing Zhuang ,  Jalil Fadavi-Ardekani ,  Vinay Kumar Bhasin ,  Lawrence John Madar, III ,  Chenmin Zhang ,  Vafa James Rakshani

    IPC分类号： G06F1/26 ,  G06F1/32

    CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F1/3296 ,  Y02D10/128 ,  Y02D10/172

    摘要： A state machine and an external interface, including its associated input-outputs (IOs), are always powered on and used to manage the chip power modes and power mode transitions. The chip power modes are defined as RUN, HIBERNATE, POWERDOWN, with many more possible with this invention. For example, once the device is in HIBERNATE or POWERDOWN modes, the power supplies to the IC are either reduced, or completely disconnected except for this controller state machine. This invention's state machine and control mechanism, in response to some external “wake up event”, will bring the chip to RUN mode by managing the state of the external power supplies through its control interface. The implementation achieves small die size and extreme low power consumption.

    摘要翻译： 包括其相关输入输出（IO）在内的状态机和外部接口总是通电并用于管理芯片功率模式和功率模式转换。 芯片功率模式被定义为RUN，HIBERNATE，POWERDOWN，本发明可能更多。 例如，一旦设备处于HIBERNATE或POWERDOWN模式，除了该控制器状态机之外，IC的电源被减少或完全断开。 本发明的状态机和控制机制响应于一些外部“唤醒事件”，通过其控制接口管理外部电源的状态，将芯片带到RUN模式。 该实现实现了小芯片尺寸和极低的功耗。