Abstract:
The present disclosure proposes a fully integrated accurate LED output current controlling circuit and method, which can be seamlessly combined with true PWM dimming. The current controlling circuit has an auto zero function in the light-emitting diode driver to eliminate offsets caused by the system, process variations, parasitic effects, dimming and so on in an LED driver application, and thus is capable of controlling the LED current with high accuracy. Moreover, the driver of the present disclosure does not require the use of external components such as an external resistor to regulate current accuracy.
Abstract:
The present disclosure proposes a fully integrated accurate LED output current controlling circuit and method, which can be seamlessly combined with true PWM dimming. The current controlling circuit has an auto zero function in the light-emitting diode driver to eliminate offsets caused by the system, process variations, parasitic effects, dimming and so on in an LED driver application, and thus is capable of controlling the LED current with high accuracy. Moreover, the driver of the present disclosure does not require the use of external components such as an external resistor to regulate current accuracy.
Abstract:
An ESD protection circuit for a switching power converter which includes a high-side switching element connected between a supply voltage and the switching node, and a low-side switching element connected between the switching node and a common node. A current conduction path couples an ESD event that occurs on the switching node to an ESD sense node, and an ESD sensing circuit coupled to the sense node generates a trigger signal when an ESD event is sensed. A first logic gate keeps the high-side switching element off when the trigger signal indicates the sensing of an ESD event, and a second logic gate causes the low-side switching element to turn on when an ESD event is sensed such that the low-side switching element provides a conductive discharge path between the switching node and common node.
Abstract:
A system and method are disclosed for maintaining an output voltage of a constant current source circuit. A constant current source circuit is provided that comprises a voltage regulator, a first feedback loop and a second feedback loop that are connected to the voltage regulator, and a sample and hold circuit that is connected to the second feedback loop. The voltage regulator regulates an output voltage VOUT to a reference voltage VREF using a first feedback voltage signal FB on the first feedback loop. The sample and hold circuit samples and holds a second feedback voltage signal VFB from the second feedback loop while the first feedback loop is connected. The voltage regulator regulates an output voltage VOUT to the second feedback reference voltage signal VFB when the first feedback loop is disconnected.
Abstract:
An H-bridge buck-boost converter includes a first half-bridge portion having at least one first transistor, an inductor portion connected to the first half-bridge portion at a first connection, a second half-bride portion connected to the inductor portion at a second connection, the second half-bridge portion having at least one second transistor, and a control portion configured to provide a first switching signal to a gate of the first transistor of the first half-bridge portion as a function of a voltage at the first connection.
Abstract:
A current mode PWM buck regulator is provided. The regulator includes a top-side transistor, a bottom-side transistor, an inductor, a sample-and-hold circuit, a ramp generator, a PWM comparator, an error amplifier, and a current sense amplifier. A current through the low-side transistor is sensed by the current sense amplifier. Also, a current sense voltage provided by the current sense amplifier is sampled when the low-side transistor is on, and held when the low-side transistor is off. The ramp generator is arranged to generate a voltage ramp that emulates the upslope of the inductor current. Additionally, the sampled low-side transistor current is combined with the voltage ramp. The PWM comparator is arranged to provide a PWM signal by comparing the voltage ramp to a comparison signal provided by the error amplifier.
Abstract:
A feed-forward path is combined with a feed-back path to produce an output signal representation of an input signal frequency. The feed-forward path adjusts the output signal representation in response to a change in the input signal frequency, and does so in a response time that is independent of the feed-back path. Input frequencies can be represented as voltages, and first and second input frequency ranges which differ from one another can both be represented in the same range of voltages.
Abstract:
A regulator is provided. The regulator includes a main switch, a synchronous switch, an inductor, a sample-and-hold circuit, a ramp generator, a PWM comparator, an error amplifier, and a current sense amplifier. A current through the synchronous switch is sensed by the current sense amplifier. Also, a current sense voltage provided by the current sense amplifier is sampled when the synchronous switch is on, and held when the synchronous switch is off. The ramp generator is arranged to generate a voltage ramp that emulates the slope of the inductor current while the synchronous switch is open. Additionally, the sampled synchronous switch current is combined with the voltage ramp. The PWM comparator is arranged to provide a PWM signal by comparing the voltage ramp to a comparison signal provided by the error amplifier.
Abstract:
An H-bridge buck-boost converter includes a first half-bridge portion having at least one first transistor, an inductor portion connected to the first half-bridge portion at a first connection, a second half-bride portion connected to the inductor portion at a second connection, the second half-bridge portion having at least one second transistor, and a control portion configured to provide a first switching signal to a gate of the first transistor of the first half-bridge portion as a function of a voltage at the first connection.
Abstract:
A current mode PWM buck regulator is provided. The regulator includes a top-side transistor, a bottom-side transistor, an inductor, a sample-and-hold circuit, a ramp generator, a PWM comparator, an error amplifier, and a current sense amplifier. A current through the low-side transistor is sensed by the current sense amplifier. Also, a current sense voltage provided by the current sense amplifier is sampled when the low-side transistor is on, and held when the low-side transistor is off. The ramp generator is arranged to generate a voltage ramp that emulates the upslope of the inductor current. Additionally, the sampled low-side transistor current is combined with the voltage ramp. The PWM comparator is arranged to provide a PWM signal by comparing the voltage ramp to a comparison signal provided by the error amplifier.