公开(公告)号：US20140077341A1

公开(公告)日：2014-03-20

申请号：US13615673

申请日：2012-09-14

申请人： Bing-Jye Kuo ,  Hong-Wen Lin ,  Yu-Jie Ji

发明人： Bing-Jye Kuo ,  Hong-Wen Lin ,  Yu-Jie Ji

IPC分类号： H01L23/544

CPC分类号： H01L23/585 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit (IC) and a seal ring thereof are provided. The IC includes a first seal ring. The first seal ring is disposed in the IC. The first seal ring includes at least one stagger structure. The at least one stagger structure includes at least one stagger unit. The at least one stagger unit makes staggered connection with another neighboring stagger unit.

摘要翻译： 提供集成电路（IC）及其密封环。 IC包括第一密封环。 第一密封环设置在IC中。 第一密封环包括至少一个交错结构。 所述至少一个交错结构包括至少一个交错单元。 至少一个交错单元与另一个相邻的交错单元进行交错连接。

公开(公告)号：US08933539B2

公开(公告)日：2015-01-13

申请号：US13615673

申请日：2012-09-14

申请人： Bing-Jye Kuo ,  Hong-Wen Lin ,  Yu-Jie Ji

发明人： Bing-Jye Kuo ,  Hong-Wen Lin ,  Yu-Jie Ji

IPC分类号： H01L23/544

CPC分类号： H01L23/585 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit (IC) and a seal ring thereof are provided. The IC includes a first seal ring. The first seal ring is disposed in the IC. The first seal ring includes at least one stagger structure. The at least one stagger structure includes at least one stagger unit. The at least one stagger unit makes staggered connection with another neighboring stagger unit.

摘要翻译： 提供集成电路（IC）及其密封环。 IC包括第一密封环。 第一密封环设置在IC中。 第一密封环包括至少一个交错结构。 所述至少一个交错结构包括至少一个交错单元。 至少一个交错单元与另一个相邻的交错单元进行交错连接。

公开(公告)号：US07460049B2

公开(公告)日：2008-12-02

申请号：US11734897

申请日：2007-04-13

申请人： Bing-Jye Kuo

发明人： Bing-Jye Kuo

IPC分类号： H03M1/12

CPC分类号： H03M1/145 ,  G01R21/133 ,  H03M1/46

摘要： A power-to-digital converter (PDC) converting a signal power to digital code. The PDC comprises a power detector, an analog-to-digital converter (ADC), and a timing and logic control circuit. The power detector receives the signal power and generates a DC output and a first determined number of bits. The ADC is coupled to the power detector and receives and converts the DC output to a second determined number of bits. The timing control logic circuit is coupled to the power detector and the ADC and sequentially enables the power detector and the ADC. The first and second predetermined numbers of bits are respectively most significant bits (MSBs) and least significant bits (LSBs) of the digital code. The bit resolution of the digital code is the sum of the first and second numbers.

摘要翻译： 将信号功率转换为数字码的功率数字转换器（PDC）。 PDC包括功率检测器，模数转换器（ADC）以及定时和逻辑控制电路。 功率检测器接收信号功率并产生DC输出和第一确定位数。 ADC耦合到功率检测器，并将DC输出接收并转换为第二确定位数。 定时控制逻辑电路耦合到功率检测器和ADC，并且顺序启用功率检测器和ADC。 第一和第二预定数量的比特分别是数字码的最高有效位（MSB）和最低有效位（LSB）。 数字代码的位分辨率是第一和第二数字的和。

公开(公告)号：US07679869B2

公开(公告)日：2010-03-16

申请号：US11468316

申请日：2006-08-30

申请人： Bing-Jye Kuo ,  Shou-Tsung Wang ,  Po-Sen Tseng ,  Chih-Chun Tang ,  Shin-Fu Chen

发明人： Bing-Jye Kuo ,  Shou-Tsung Wang ,  Po-Sen Tseng ,  Chih-Chun Tang ,  Shin-Fu Chen

IPC分类号： H02H9/00

CPC分类号： H01L27/0259 ,  H01L2224/05553 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13091 ,  H03K19/00384 ,  H01L2924/00

摘要： An input/output device comprises a bonding pad, a signal transport circuit, and a blocking unit. The signal transport circuit has a first terminal connected to the bonding pad and a second terminal connected to a core circuit of an IC product. The signal transport circuit is capable of transporting a signal either from the bonding pad to the core circuit or from the core circuit to the bonding pad. The blocking unit has a control terminal and is coupled between the bonding pad and the signal transport circuit. The control terminal is coupled to receive an enable signal. The blocking unit ties the bonding pad to a predetermined voltage level when the enable signal is de-asserted, thereby blocking the signal transport provided by the signal transport circuit. The blocking unit unties the bonding pad from the predetermined voltage level when the enable signal is asserted.

摘要翻译： 输入/输出设备包括接合焊盘，信号传输电路和阻塞单元。 信号传输电路具有连接到接合焊盘的第一端子和连接到IC产品的核心电路的第二端子。 信号传输电路能够传输从焊盘到芯电路或从芯电路到焊盘的信号。 阻塞单元具有控制端子并且耦合在接合焊盘和信号传输电路之间。 控制端子被耦合以接收使能信号。 当使能信号被断言时，阻塞单元将接合焊盘连接到预定的电压电平，从而阻挡由信号传输电路提供的信号传输。 当使能信号被断言时，阻塞单元将接合焊盘从预定电压电平开始。

公开(公告)号：US20080252506A1

公开(公告)日：2008-10-16

申请号：US11734897

申请日：2007-04-13

申请人： Bing-Jye Kuo

发明人： Bing-Jye Kuo

IPC分类号： H03M1/12

CPC分类号： H03M1/145 ,  G01R21/133 ,  H03M1/46

摘要： A power-to-digital converter (PDC) converting a signal power to digital code. The PDC comprises a power detector, an analog-to-digital converter (ADC), and a timing and logic control circuit. The power detector receives the signal power and generates a DC output and a first determined number of bits. The ADC is coupled to the power detector and receives and converts the DC output to a second determined number of bits. The timing control logic circuit is coupled to the power detector and the ADC and sequentially enables the power detector and the ADC. The first and second predetermined numbers of bits are respectively most significant bits (MSBs) and least significant bits (LSBs) of the digital code. The bit resolution of the digital code is the sum of the first and second numbers.

摘要翻译： 将信号功率转换为数字码的功率数字转换器（PDC）。 PDC包括功率检测器，模数转换器（ADC）以及定时和逻辑控制电路。 功率检测器接收信号功率并产生DC输出和第一确定位数。 ADC耦合到功率检测器，并将DC输出接收并转换为第二确定位数。 定时控制逻辑电路耦合到功率检测器和ADC，并且顺序启用功率检测器和ADC。 第一和第二预定数量的比特分别是数字码的最高有效位（MSB）和最低有效位（LSB）。 数字代码的位分辨率是第一和第二数字的和。

公开(公告)号：US20080077346A1

公开(公告)日：2008-03-27

申请号：US11530484

申请日：2006-09-11

申请人： Bing-Jye Kuo ,  Shou-Tsung Wang

发明人： Bing-Jye Kuo ,  Shou-Tsung Wang

IPC分类号： H03F3/45 ,  G01R35/00 ,  G01D18/00

CPC分类号： H04B1/30 ,  G01D18/008 ,  H01L27/0255 ,  H03F1/52

摘要： An apparatus and method for internally calibrating a direct conversion receiver (DCR) through feeding a calibration signal via ESD protection circuitry is disclosed. The apparatus includes an internal signal generator for generating a calibration signal, a front-end input stage for receiving an RF signal at an input node, an ESD protection unit for protecting against electrostatic discharge, and a switch unit coupled to the ESD protection unit, for selectively passing a calibration signal to the front-end input stage, whereby the connection of the switch unit and the ESD protection unit means that when the DCR is operating in normal mode, the switch unit will not affect the noise performance and matching of the receiver.

摘要翻译： 公开了一种通过经由ESD保护电路馈送校准信号来内部校准直接转换接收器（DCR）的装置和方法。 该装置包括用于产生校准信号的内部信号发生器，用于在输入节点处接收RF信号的前端输入级，用于防止静电放电的ESD保护单元，以及耦合到ESD保护单元的开关单元， 用于选择性地将校准信号传递到前端输入级，由此开关单元和ESD保护单元的连接意味着当DCR正常工作时，开关单元不会影响噪声性能和 接收器。

公开(公告)号：US20080062594A1

公开(公告)日：2008-03-13

申请号：US11468316

申请日：2006-08-30

申请人： Bing-Jye Kuo ,  Shou-Tsung Wang ,  Po-Sen Tseng ,  Chih-Chun Tang ,  Shin-Fu Chen

发明人： Bing-Jye Kuo ,  Shou-Tsung Wang ,  Po-Sen Tseng ,  Chih-Chun Tang ,  Shin-Fu Chen

IPC分类号： H02H9/00

CPC分类号： H01L27/0259 ,  H01L2224/05553 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13091 ,  H03K19/00384 ,  H01L2924/00

摘要： An input/output device comprises a bonding pad, a signal transport circuit, and a blocking unit. The signal transport circuit has a first terminal connected to the bonding pad and a second terminal connected to a core circuit of an IC product. The signal transport circuit is capable of transporting a signal either from the bonding pad to the core circuit or from the core circuit to the bonding pad. The blocking unit has a control terminal and is coupled between the bonding pad and the signal transport circuit. The control terminal is coupled to receive an enable signal. The blocking unit ties the bonding pad to a predetermined voltage level when the enable signal is de-asserted, thereby blocking the signal transport provided by the signal transport circuit. The blocking unit unties the bonding pad from the predetermined voltage level when the enable signal is asserted.

摘要翻译： 输入/输出设备包括接合焊盘，信号传输电路和阻塞单元。 信号传输电路具有连接到接合焊盘的第一端子和连接到IC产品的核心电路的第二端子。 信号传输电路能够传输从焊盘到芯电路或从芯电路到焊盘的信号。 阻塞单元具有控制端子并且耦合在接合焊盘和信号传输电路之间。 控制端子被耦合以接收使能信号。 当使能信号被解除断言时，阻塞单元将接合焊盘连接到预定的电压电平，从而阻挡由信号传输电路提供的信号传输。 当使能信号被断言时，阻塞单元将接合焊盘从预定电压电平开始。

公开(公告)号：US07567787B2

公开(公告)日：2009-07-28

申请号：US11530484

申请日：2006-09-11

申请人： Bing-Jye Kuo ,  Shou-Tsung Wang

发明人： Bing-Jye Kuo ,  Shou-Tsung Wang

IPC分类号： H04B1/26 ,  H04B17/00

CPC分类号： H04B1/30 ,  G01D18/008 ,  H01L27/0255 ,  H03F1/52

摘要： An apparatus and method for internally calibrating a direct conversion receiver (DCR) through feeding a calibration signal via ESD protection circuitry is disclosed. The apparatus includes an internal signal generator for generating a calibration signal, a front-end input stage for receiving an RF signal at an input node, an ESD protection unit for protecting against electrostatic discharge, and a switch unit coupled to the ESD protection unit, for selectively passing a calibration signal to the front-end input stage, whereby the connection of the switch unit and the ESD protection unit means that when the DCR is operating in normal mode, the switch unit will not affect the noise performance and matching of the receiver.

摘要翻译： 公开了一种通过经由ESD保护电路馈送校准信号来内部校准直接转换接收器（DCR）的装置和方法。 该装置包括用于产生校准信号的内部信号发生器，用于在输入节点处接收RF信号的前端输入级，用于防止静电放电的ESD保护单元，以及耦合到ESD保护单元的开关单元， 用于选择性地将校准信号传递到前端输入级，由此开关单元和ESD保护单元的连接意味着当DCR正常工作时，开关单元不会影响噪声性能和 接收器。