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公开(公告)号:US20070096337A1
公开(公告)日:2007-05-03
申请号:US11457767
申请日:2006-07-14
申请人: Bong Rak CHOI
发明人: Bong Rak CHOI
CPC分类号: H01L23/49838 , H01L21/563 , H01L24/28 , H01L24/81 , H01L2224/16225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3025 , H05K1/111 , H05K3/3452 , H05K2201/09781 , H05K2201/0989 , H05K2201/10674 , H05K2201/10977 , Y02P70/611 , H01L2924/3512 , H01L2924/00
摘要: A void-free circuit board and a semiconductor package having the same includes a protective layer covering and protecting an electrode pattern formed on an upper surface of a substrate. The protective layer is applied around a solder ball provided on the electrode pattern except on an immediate vicinity of the solder ball to form an opening. The semiconductor package also includes at least one gap compensation part comprising a protrusion that comes in contact with an underfill material injected to the opening before the electrode pattern. The protrusion has a thickness substantially the same as that of a portion of the electrode pattern exposed in the opening. This prevents voids with air captured therein due to non-uniform capillary action during injection of the underfill material.
摘要翻译: 无空隙电路板及其半导体封装具有覆盖并保护形成在基板上表面的电极图案的保护层。 保护层围绕设置在电极图案上的焊球周围施加,除了在焊球的紧邻附近形成开口。 半导体封装还包括至少一个间隙补偿部件,其包括与在电极图案之前注入到开口处的底部填充材料接触的突起。 突出部的厚度与暴露于开口部的电极图案的部分的厚度基本相同。 这防止了在注入底部填充材料期间由于毛细作用不均匀而捕获在其中的空气的空隙。