公开(公告)号：US20110175858A1

公开(公告)日：2011-07-21

申请号：US12917018

申请日：2010-11-01

Applicant: Bong-Jun LEE ,  Jong-Hwan LEE ,  Yu-Jin KIM

Inventor： Bong-Jun LEE ,  Jong-Hwan LEE ,  Yu-Jin KIM

IPC: G09G3/36 ,  G09G5/00

CPC classification number: G09G3/3688 ,  G09G2310/0297 ,  G09G2320/0233

Abstract: In a liquid crystal display apparatus, a first control signal bus line receives a first control signal. A second control signal bus line receives a second control signal that lags behind the first control signal. A de-multiplexer circuit includes a first switching element and a second switching element. The first switching element switches a current path between a first source line and a first data line in response to the first control signal, and the second switching element switches a current path between the first source line and a second data line in response to the second control signal. A pixel part includes a first pixel connected to the first control signal bus line and corresponding to a first color filter, a second pixel connected to the second control signal bus line and corresponding to a second color filter, and a third pixel corresponding to a third color filter, wherein the third pixels are alternately connected to the first control signal bus line and the second control signal bus line.

Abstract translation: 在液晶显示装置中，第一控制信号总线接收第一控制信号。 第二控制信号总线接收滞后第一控制信号的第二控制信号。 解复用器电路包括第一开关元件和第二开关元件。 第一开关元件响应于第一控制信号而在第一源线和第一数据线之间切换电流路径，并且第二开关元件响应于第二开关元件切换第二源线和第二数据线之间的电流路径 控制信号。 像素部分包括连接到第一控制信号总线并对应于第一滤色器的第一像素，连接到第二控制信号总线并对应于第二滤色器的第二像素，以及对应于第三滤色器的第三像素 滤色器，其中第三像素交替地连接到第一控制信号总线和第二控制信号总线。

公开(公告)号：US20090009685A1

公开(公告)日：2009-01-08

申请号：US12168419

申请日：2008-07-07

Applicant: Sang-Yong NO ,  Sun-Hyung KIM ,  Jong-Hwan LEE ,  Beom-Jun KIM ,  Bong-Jun LEE ,  Hong-Woo LEE ,  Shin-Tack KANG

Inventor： Sang-Yong NO ,  Sun-Hyung KIM ,  Jong-Hwan LEE ,  Beom-Jun KIM ,  Bong-Jun LEE ,  Hong-Woo LEE ,  Shin-Tack KANG

IPC: G02F1/13357 ,  G02F1/1335

CPC classification number: G02F1/133502 ,  G02F1/133602 ,  G02F2001/133567

Abstract: A liquid crystal display includes a backlight unit, a liquid crystal display panel, and first and second polarizers. The first polarizer is attached to a lower portion of the liquid crystal display panel to face the backlight unit, and the second polarizer is attached to an upper portion of the liquid crystal display panel to correspond to the first polarizer. The liquid crystal display panel includes a first optical layer that partially reflects light provided from the backlight unit, and the first polarizer includes a second optical layer to prevent the light reflected by the first optical layer from being re-reflected to the liquid crystal display panel.

Abstract translation: 液晶显示器包括背光单元，液晶显示面板以及第一和第二偏振器。 第一偏振器附接到液晶显示面板的下部以面向背光单元，第二偏振器附着到液晶显示面板的上部，以对应于第一偏振器。 液晶显示面板包括部分地反射从背光单元提供的光的第一光学层，并且第一偏振器包括第二光学层，以防止第一光学层反射的光被再反射到液晶显示面板 。

公开(公告)号：US20070183218A1

公开(公告)日：2007-08-09

申请号：US11459129

申请日：2006-07-21

Applicant: Bong-Jun LEE ,  Chung-Hun HA ,  Jong-Hyuk LEE ,  Shin-Tack KANG ,  Yu-Jin KIM ,  Jin-Suk SEO

Inventor： Bong-Jun LEE ,  Chung-Hun HA ,  Jong-Hyuk LEE ,  Shin-Tack KANG ,  Yu-Jin KIM ,  Jin-Suk SEO

IPC: G11C16/04

CPC classification number: G09G3/3677 ,  G09G2310/0251 ,  G09G2310/0286 ,  G11C19/184

Abstract: In a gate driving unit and a display apparatus, a first gate driving circuit is connected to a first end of a plurality of gate lines, a second gate driving circuit is connected to a second end of the gate lines, and they are substantially simultaneously turned on. The first and second gate driving circuits apply a first gate signal having a first pre-charging period and a first active period, which is adjacent to the first pre-charging period, to odd-numbered gate lines and apply a second gate signal having a second pre-charging period and a second active period, which is adjacent to the second pre-charging period, to even-numbered gate lines.

Abstract translation: 在栅极驱动单元和显示装置中，第一栅极驱动电路连接到多条栅极线的第一端，第二栅极驱动电路连接到栅极线的第二端，并且基本上同时转动 上。 第一和第二栅极驱动电路将具有与第一预充电周期相邻的第一预充电周期和第一有效周期的第一栅极信号施加到奇数编号的栅极线，并施加具有 与第二预充电周期相邻的第二预充电周期和第二有效周期到偶数栅极线。

公开(公告)号：US20080266477A1

公开(公告)日：2008-10-30

申请号：US11869197

申请日：2007-10-09

Applicant: Bong-Jun LEE ,  Kyung-wook KIM ,  Jong-oh KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Hyuk-jin KIM

Inventor： Bong-Jun LEE ,  Kyung-wook KIM ,  Jong-oh KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Hyuk-jin KIM

IPC: H03K3/01 ,  G02F1/1368

CPC classification number: G09G3/3677 ,  G02F1/13454 ,  G09G2310/0286 ,  G09G2340/145 ,  G11C19/184

Abstract: A gate driving circuit has a first stage which includes: a pull-up driving unit which receives a first carry signal from a second stage and outputs a control signal having first, second, third and fourth voltages to a first node during a preliminary period, a gate active period, a first gate inactive period and a second gate inactive period, respectively; a pull-up unit which receives the control signal and outputs a gate-on signal to a second node during the gate active period; a carry output unit which receives the control signal and outputs a second carry signal to a third stage during the gate active period; and a pull-down unit which receives a gate-off signal and the second carry signal from the second stage and outputs the control signal having the fourth voltage level to the first node during the second gate inactive period.

Abstract translation: 栅极驱动电路具有第一级，其包括：上拉驱动单元，其从初级阶段接收来自第二级的第一进位信号，并将具有第一，第二，第三和第四电压的控制信号输出到第一节点， 栅极有效期，第一栅极无效期和第二栅极非有效期; 上拉单元，其在所述门有效期间内接收所述控制信号并将栅极导通信号输出到第二节点; 进位输出单元，其在所述门有效期间内接收所述控制信号并将第二进位信号输出到第三级; 以及下拉单元，其从第二级接收栅极关闭信号和第二进位信号，并且在第二栅极非活动时段期间将具有第四电压电平的控制信号输出到第一节点。

公开(公告)号：US20100157234A1

公开(公告)日：2010-06-24

申请号：US12637943

申请日：2009-12-15

Applicant: Bong-Jun LEE ,  Kyung-Wook KIM

Inventor： Bong-Jun LEE ,  Kyung-Wook KIM

IPC: G02F1/1345 ,  H01L27/088 ,  H01L21/77

CPC classification number: H01L27/124 ,  G02F1/136286

Abstract: A display apparatus includes a thin film transistor array panel including a display region and a non-display region, a gate line extending along a first direction, a data line extending along a second direction, substantially perpendicular to the first direction, the data line being insulated from and crossing the gate line, a storage electrode line which receives a common voltage signal, and a first gate driver disposed on the thin film transistor array panel and which supplies at least one of a gate on signal and a gate off signal to the gate line. The storage electrode line includes a first portion extending along the first direction and a second portion extending along the second direction in the non-display region. A width, measured along the second direction, of the first portion is less than a width, measured along the first direction, of the second portion.

Abstract translation: 一种显示装置，具备包括显示区域和非显示区域的薄膜晶体管阵列面板，沿第一方向延伸的栅极线，沿着与第一方向大致垂直的第二方向延伸的数据线，数据线为 绝缘和交叉栅极线，接收公共电压信号的存储电极线和设置在薄膜晶体管阵列面板上的第一栅极驱动器，并且将栅极导通信号和栅极截止信号中的至少一个提供给 门线。 存储电极线包括沿着第一方向延伸的第一部分和在非显示区域中沿第二方向延伸的第二部分。 第一部分沿着第二方向测量的宽度小于第二部分沿着第一方向测量的宽度。

公开(公告)号：US20080316384A1

公开(公告)日：2008-12-25

申请号：US12033986

申请日：2008-02-20

Applicant: Bong-Jun LEE ,  Myung-Koo HUR ,  Jong-Oh KIM ,  Dong-Wuuk SEO ,  Sung-Man KIM

Inventor： Bong-Jun LEE ,  Myung-Koo HUR ,  Jong-Oh KIM ,  Dong-Wuuk SEO ,  Sung-Man KIM

IPC: G02F1/136 ,  H01L29/04 ,  H01L21/84

CPC classification number: G02F1/136213 ,  H01L27/12 ,  H01L27/124 ,  H01L29/41733

Abstract: A display substrate includes a first metal pattern formed on a substrate and includes a data line to which a pixel voltage is applied, an insulating layer formed on the substrate on which the first metal pattern is formed, an active pattern formed on the insulating layer, a second metal pattern formed on the insulating layer and including a gate line and a storage line, the gate line crossing the data line, a scanning signal applied to the gate line, a protective layer formed on the substrate on which the second metal pattern is formed, and a pixel electrode formed on the protective layer. A method for manufacturing the display substrate, and a display apparatus including the display substrate are further provided.

Abstract translation: 显示基板包括形成在基板上的第一金属图案，并且包括施加了像素电压的数据线，形成在其上形成有第一金属图案的基板上的绝缘层，形成在绝缘层上的有源图案， 形成在绝缘层上的第二金属图案，包括栅极线和存储线，与数据线交叉的栅极线，施加到栅极线的扫描信号，形成在基板上的保护层，第二金属图案 以及形成在保护层上的像素电极。 还提供了一种制造显示基板的方法，以及包括显示基板的显示装置。

公开(公告)号：US20130033417A1

公开(公告)日：2013-02-07

申请号：US13648505

申请日：2012-10-10

Applicant: Sung-Man KIM ,  Bong-Jun LEE ,  Shin-Tack KANG ,  Hyeong-Jun PARK ,  Yong-Woo LEE

Inventor： Sung-Man KIM ,  Bong-Jun LEE ,  Shin-Tack KANG ,  Hyeong-Jun PARK ,  Yong-Woo LEE

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G09G2310/0248 ,  G11C19/184

Abstract: A scan driver drives a display device having a plurality of gate lines transferring scan signals, and a plurality of source lines transferring data signals. The scan driver includes a shift register and a multiple signal applying unit. The shift register includes a plurality of cascade-connected stages, each stage having an output terminal electrically connected to a respective one of the plurality of gate lines. The multiple signal applying unit applies a sub scan signal and a main scan signal. The sub scan signal and the main scan signal sequentially activate each of the plurality of gate lines. Therefore, the scan lines receive the scan signal twice, so that the liquid crystal capacitors electrically connected to the gate lines receive the data voltage twice. As a result, even though the time for charging the liquid crystal capacitors may be reduced, the liquid crystal capacitors may be fully charged to enhance display quality.

Abstract translation: 扫描驱动器驱动具有传送扫描信号的多条栅极线的显示装置和传送数据信号的多条源极线。 扫描驱动器包括移位寄存器和多信号施加单元。 移位寄存器包括多个级联连接的级，每级具有电连接到多条栅极线中的相应一条栅线的输出端。 多信号施加单元施加副扫描信号和主扫描信号。 子扫描信号和主扫描信号顺序地激活多条栅极线中的每一条。 因此，扫描线接收扫描信号两次，使得电连接到栅极线的液晶电容器接收数据电压两次。 结果，即使可以减少液晶电容器的充电时间，液晶电容器也可能被充满电以提高显示质量。

公开(公告)号：US20090096737A1

公开(公告)日：2009-04-16

申请号：US12128117

申请日：2008-05-28

Applicant: Sung-Man KIM ,  Bong-Jun LEE ,  Hong-Woo LEE

Inventor： Sung-Man KIM ,  Bong-Jun LEE ,  Hong-Woo LEE

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3648 ,  G09G2300/0447 ,  G09G2310/0286 ,  G11C19/184

Abstract: In a gate driver of a display device, a plurality of first stages each transmit a first gate signal having a first gate-on voltage to first gate lines, and a plurality of second stages each transmit a second gate signal having a second gate-on voltage to second gate lines and output a carry signal corresponding to the second gate signal. Each first stage outputs the first gate-on voltage based on a third gate-on voltage of the carry signal from a previous second stage, and each second stage outputs the second gate-on voltage based on the third gate-on voltage of the carry signal from the previous second stage.

Abstract translation: 在显示装置的栅极驱动器中，多个第一级每个向第一栅极线发送具有第一栅极导通电压的第一栅极信号，并且多个第二级每个发送具有第二栅极导通的第二栅极信号 电压到第二栅极线并输出对应于第二栅极信号的进位信号。 每个第一级基于来自前一第二级的进位信号的第三栅极导通电压输出第一栅极导通电压，并且每个第二级基于进位的第三栅极导通电压输出第二栅极导通电压 来自前一个第二阶段的信号。

公开(公告)号：US20080050853A1

公开(公告)日：2008-02-28

申请号：US11843194

申请日：2007-08-22

Applicant: Jin-Suk SEO ,  Sung-Man KIM ,  Bong-Jun LEE ,  Byeong-Jae AHN ,  Jong Hyuk LEE

Inventor： Jin-Suk SEO ,  Sung-Man KIM ,  Bong-Jun LEE ,  Byeong-Jae AHN ,  Jong Hyuk LEE

IPC: H01L21/00

CPC classification number: H01L27/1288 ,  G02F1/13439 ,  H01L27/1214

Abstract: In a method of fabricating a display substrate, a photoresist layer pattern is formed on a substrate where a thin film transistor (TFT) is formed, and a transparent conductive layer is formed on the photoresist layer pattern. Then, the transparent conductive layer is patterned by a lift-off method to form a transparent conductive layer pattern while partially removing the photoresist layer pattern.

Abstract translation: 在制造显示基板的方法中，在形成薄膜晶体管（TFT）的基板上形成光致抗蚀剂层图案，并且在光致抗蚀剂层图案上形成透明导电层。 然后，通过剥离法对透明导电层进行图案化以形成透明导电层图案，同时部分去除光致抗蚀剂层图案。

公开(公告)号：US20130141318A1

公开(公告)日：2013-06-06

申请号：US13485243

申请日：2012-05-31

Applicant: Beom-Jun KIM ,  Myung-Koo HUR ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Myung-Sub LEE ,  Gyu-Tae KIM

Inventor： Beom-Jun KIM ,  Myung-Koo HUR ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Myung-Sub LEE ,  Gyu-Tae KIM

IPC: G09G3/36 ,  H03K17/693

CPC classification number: G09G3/3688 ,  G09G3/36 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0251 ,  G09G2310/0291 ,  G09G2310/08 ,  G11C19/28 ,  H03K17/693

Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.

Abstract translation: 提供一种栅极驱动电路，其包括彼此级联的多个级并输出多个栅极信号。 第n（n是自然数）级包括门输出部分，第一节点控制部分和进位部分。 栅极输出部分包括第一晶体管。 第一晶体管响应于控制节点的高电压而将时钟信号的高电压输出到第n栅极信号的高电压。 第一节点控制部分连接到控制节点以控制控制节点的信号，并且包括至少一个具有比第一晶体管的沟道长度更长的沟道的晶体管。 进位部分响应于控制节点的信号将时钟信号的高电压输出到第n进位信号。