Extruder injection apparatus and method
    1.
    发明授权
    Extruder injection apparatus and method 失效
    挤出机注射装置和方法

    公开(公告)号:US5071256A

    公开(公告)日:1991-12-10

    申请号:US549974

    申请日:1990-07-09

    IPC分类号: B29C47/60

    摘要: A plasticating apparatus and method for its use including a rotating screw having a helical flight disposed within and cooperating with the inner wall of a heated barrel with said barrel provided with inlet and outlet openings so that particles of resinous material are introduced through said inlet opening to a helical valley extending along said flight to be plasticated by said screw and advanced towards said outlet opening. A barrier extends along said helical valley to divide said helical valley into coextensive side by side helical valley sections. The barrier extends in a path which is non-parallel and alternating with respect to the helical flight so that the pitch of the barrier is alternately greater than and less than the pitch of the helical flight. The height of the barrier is less than the height of the flight so that the resinous material overflows the barrier due to changes in width of said side by side helical valley sections.

    摘要翻译: 一种塑料装置及其使用方法,包括旋转螺杆,该旋转螺杆具有设置在加热筒体的内壁内并与其配合的带旋转螺杆,所述筒体具有入口和出口开口,使得树脂材料颗粒通过所述入口开口引入至 沿着所述飞行物延伸的螺旋谷,由所述螺钉塑化并朝所述出口开口前进。 屏障沿着所述螺旋谷延伸,以将所述螺旋谷分成共同延伸的并排螺旋谷部分。 屏障在相对于螺旋飞行不平行和交替的路径中延伸,使得屏障的间距交替地大于并小于螺旋形飞行的俯仰。 阻挡层的高度小于飞行高度,使得树脂材料由于所述并排的螺旋谷部分的宽度变化而溢出障碍物。

    Extruder injection apparatus
    2.
    发明授权
    Extruder injection apparatus 失效
    挤出机注射装置

    公开(公告)号:US5318357A

    公开(公告)日:1994-06-07

    申请号:US899347

    申请日:1992-06-16

    IPC分类号: B29C47/60 B01F7/08 B29B7/42

    摘要: A screw for use in an plasticating injection apparatus includes a plurality of interrupted primary flights. An outer surface of a primary valley is formed by the primary flights and features a plurality of plateaus. The plateaus span adjacent sections of the primary flights and define shallow levels between deeper levels of the primary valleys. This depth differential contributes to a turbulent mixing action which, along with the primary and secondary valleys, contributes to improve mixing action within a metering section of the screw. The primary flights are interrupted by secondary valleys which are of opposite hand to the primary valleys.

    摘要翻译: 用于塑化注射装置的螺钉包括多个中断的一次航行。 主谷的外表面由主飞行形成并且具有多个平台。 高原跨越主要航段的相邻部分,并定义较深层次的主要峡谷之间的浅层。 该深度差异有助于湍流混合作用,其与主要和次要谷一起有助于改善螺杆的计量部分内的混合作用。 主要航班由与主要山谷相反的次级峡谷中断。

    Patterning a gate stack of a non-volatile memory (NVM) with formation of a metal-oxide-semiconductor field effect transistor (MOSFET)
    3.
    发明授权
    Patterning a gate stack of a non-volatile memory (NVM) with formation of a metal-oxide-semiconductor field effect transistor (MOSFET) 有权
    通过形成金属氧化物半导体场效应晶体管(MOSFET)来形成非易失性存储器(NVM)的栅极堆叠,

    公开(公告)号:US08426263B2

    公开(公告)日:2013-04-23

    申请号:US13077569

    申请日:2011-03-31

    IPC分类号: H01L21/8238

    CPC分类号: H01L29/7881 H01L29/66825

    摘要: A first dielectric layer is formed on a substrate in a transistor region and an NVM region, a first conductive layer is formed on the first dielectric layer, a second dielectric layer is formed on the first conductive layer, and a second conductive layer is formed over the second dielectric layer. A patterned etch is performed to remove at least a portion of the second conductive layer in the transistor region and to expose an extension portion of the first conductive layer. A first mask is formed over the transistor region having a first pattern, wherein the first pattern is of a gate stack of the MOSFET and an extension in the extension portion extending from the gate stack, and a second mask over the NVM region having a second pattern, wherein the second pattern is of a gate stack of the NVM cell. A patterned etch is then performed.

    摘要翻译: 在晶体管区域和NVM区域的基板上形成第一电介质层,在第一电介质层上形成第一导电层,在第一导电层上形成第二电介质层,在第一导电层上形成第二导电层 第二电介质层。 执行图案化蚀刻以去除晶体管区域中的第二导电层的至少一部分并且暴露第一导电层的延伸部分。 在具有第一图案的晶体管区域上形成第一掩模,其中第一图案是MOSFET的栅极堆叠,以及在延伸部分中从栅极堆叠延伸的延伸部分,以及位于NVM区域上的第二掩模,其具有第二图案 图案,其中所述第二图案是所述NVM单元的栅极堆叠。 然后执行图案化蚀刻。

    PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)
    4.
    发明申请
    PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) 有权
    形成金属氧化物半导体场效应晶体管(MOSFET)的非易失性存储器(NVM)的栅极堆栈

    公开(公告)号:US20120252179A1

    公开(公告)日:2012-10-04

    申请号:US13077569

    申请日:2011-03-31

    IPC分类号: H01L21/336

    CPC分类号: H01L29/7881 H01L29/66825

    摘要: A first dielectric layer is formed on a substrate in a transistor region and an NVM region, a first conductive layer is formed on the first dielectric layer, a second dielectric layer is formed on the first conductive layer, and a second conductive layer is formed over the second dielectric layer. A patterned etch is performed to remove at least a portion of the second conductive layer in the transistor region and to expose an extension portion of the first conductive layer. A first mask is formed over the transistor region having a first pattern, wherein the first pattern is of a gate stack of the MOSFET and an extension in the extension portion extending from the gate stack, and a second mask over the NVM region having a second pattern, wherein the second pattern is of a gate stack of the NVM cell. A patterned etch is then performed.

    摘要翻译: 在晶体管区域和NVM区域的基板上形成第一电介质层,在第一电介质层上形成第一导电层,在第一导电层上形成第二电介质层,在第一导电层上形成第二导电层 第二电介质层。 执行图案化蚀刻以去除晶体管区域中的第二导电层的至少一部分并且暴露第一导电层的延伸部分。 在具有第一图案的晶体管区域上形成第一掩模,其中第一图案是MOSFET的栅极堆叠,并且在从栅极堆叠延伸的延伸部分中的延伸部分以及在NVM区域上的第二掩模,其具有第二图案 图案,其中所述第二图案是所述NVM单元的栅极堆叠。 然后执行图案化蚀刻。

    THROUGH-VIA AND METHOD OF FORMING
    5.
    发明申请
    THROUGH-VIA AND METHOD OF FORMING 有权
    通过和形成的方法

    公开(公告)号:US20100129981A1

    公开(公告)日:2010-05-27

    申请号:US12277455

    申请日:2008-11-25

    申请人: Bradley P. Smith

    发明人: Bradley P. Smith

    IPC分类号: H01L21/762

    CPC分类号: H01L21/76229

    摘要: In one embodiment, a method of forming a via includes providing a semiconductor substrate, wherein the semiconductor substrate comprises a through-via region, forming isolation openings and a sacrificial feature in the through-via region, filling the isolation openings to form isolation regions, forming a dielectric layer over the semiconductor substrate after filling the isolation openings, forming a first portion of a through-via opening in the dielectric layer, forming a second portion of the through-via opening in the semiconductor substrate, wherein forming the second portion of the through-via opening comprises removing the sacrificial feature, and forming a conductive material in the first portion and the second portion of the through-via opening.

    摘要翻译: 在一个实施例中,形成通孔的方法包括提供半导体衬底,其中半导体衬底包括通孔区域,在通孔区域中形成隔离开口和牺牲特征,填充隔离开口以形成隔离区域, 在填充所述隔离开口之后,在所述半导体衬底上形成电介质层,在所述电介质层中形成贯通孔的第一部分,形成所述半导体衬底中的所述贯通通孔的第二部分, 通孔通孔包括去除牺牲特征,以及在通孔通孔的第一部分和第二部分中形成导电材料。

    Semiconductor device for reducing photovolatic current

    公开(公告)号:US06956281B2

    公开(公告)日:2005-10-18

    申请号:US10224794

    申请日:2002-08-21

    IPC分类号: H01L23/552

    摘要: A semiconductor device that has a common border between P and N wells is susceptible to photovoltaic current that is believed to be primarily generated from photons that strike this common border. Photons that strike the border are believed to create electron/hole pairs that separate when created at the PN junction of the border. The photovoltaic current can have a sufficient current density to be destructive to the metal connections to a well if the area of these metal connections to the well is small relative to the length of the border. This photovoltaic current can be reduced below destructive levels by covering the common border sufficiently to reduce the number of photons hitting the common border. The surface area of the connections can also be increased to alleviate the problem.

    METHOD AND SYSTEM FOR RECOVERING FROM TRANSISTOR AGING USING HEATING
    7.
    发明申请
    METHOD AND SYSTEM FOR RECOVERING FROM TRANSISTOR AGING USING HEATING 有权
    使用加热从晶体管老化恢复的方法和系统

    公开(公告)号:US20150002211A1

    公开(公告)日:2015-01-01

    申请号:US13929013

    申请日:2013-06-27

    IPC分类号: H01L29/43 G05F1/10

    CPC分类号: H01L21/28176

    摘要: A mechanism is provided for extending useable lifetimes of semiconductor devices that are subject to trapped charge carriers in a gate dielectric. Embodiments of the present invention provide heat to the gate dielectric region from one or more sources, where the heat sources are included in a package along with the semiconductor device. It has been determined that heat, when applied during a period when the channel region of a transistor is in accumulation mode or is not providing a current across the channel, can at least partially recover the device from trapped charge carrier effects. Embodiments of the present invention supply heat to the affected gate dielectric region using mechanisms available where the semiconductor device is used (e.g., in the field).

    摘要翻译: 提供了一种用于延长在栅极电介质中经受捕获的载流子的半导体器件的可用寿命的机制。 本发明的实施例从一个或多个源向栅介质区提供热量,其中热源与半导体器件一起包括在封装中。 已经确定,当在晶体管的沟道区域处于积聚模式或不通过沟道提供电流的时段期间施加的热量可以至少部分地将器件从俘获的电荷载体效应中恢复。 本发明的实施例使用可用于使用半导体器件的机构(例如,在现场)向受影响的栅极电介质区域供热。

    Through-via and method of forming
    8.
    发明授权
    Through-via and method of forming 有权
    通孔和成型方法

    公开(公告)号:US07985655B2

    公开(公告)日:2011-07-26

    申请号:US12277455

    申请日:2008-11-25

    申请人: Bradley P. Smith

    发明人: Bradley P. Smith

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76229

    摘要: In one embodiment, a method of forming a via includes providing a semiconductor substrate, wherein the semiconductor substrate comprises a through-via region, forming isolation openings and a sacrificial feature in the through-via region, filling the isolation openings to form isolation regions, forming a dielectric layer over the semiconductor substrate after filling the isolation openings, forming a first portion of a through-via opening in the dielectric layer, forming a second portion of the through-via opening in the semiconductor substrate, wherein forming the second portion of the through-via opening comprises removing the sacrificial feature, and forming a conductive material in the first portion and the second portion of the through-via opening.

    摘要翻译: 在一个实施例中,形成通孔的方法包括提供半导体衬底,其中半导体衬底包括通孔区域,在通孔区域中形成隔离开口和牺牲特征,填充隔离开口以形成隔离区域, 在填充所述隔离开口之后,在所述半导体衬底上形成电介质层,在所述电介质层中形成贯通孔的第一部分,形成所述半导体衬底中的所述贯通通孔的第二部分, 通孔通孔包括去除牺牲特征,以及在通孔通孔的第一部分和第二部分中形成导电材料。

    ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING THE SAME
    9.
    发明申请
    ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING THE SAME 有权
    包括电容器的电子器件及其形成方法

    公开(公告)号:US20090020849A1

    公开(公告)日:2009-01-22

    申请号:US11780900

    申请日:2007-07-20

    IPC分类号: H01L29/00 H01L21/02

    CPC分类号: H01L22/20 H01L22/12 H01L28/40

    摘要: An electronic device can include electronic components and an insulating layer overlying the electronic components. The electronic device can also include a capacitor overlying the insulating layer, wherein the capacitor includes a first electrode and a second electrode. The second electrode can include an opening, wherein from a top view, a defect lies within the opening. In another aspect, a process of forming an electronic device can include forming a first capacitor electrode layer over a substrate, forming a dielectric layer over the first capacitor electrode layer, and forming a second capacitor electrode layer over the dielectric layer. The process can also include detecting a defect and removing a first portion of the second capacitor electrode layer corresponding to the defect, wherein a second portion of the second capacitor electrode layer remains over the dielectric layer.

    摘要翻译: 电子设备可以包括电子部件和覆盖电子部件的绝缘层。 电子器件还可以包括覆盖绝缘层的电容器,其中电容器包括第一电极和第二电极。 第二电极可以包括开口,其中从顶部看,缺陷位于开口内。 另一方面,形成电子器件的方法可以包括在衬底上形成第一电容器电极层,在第一电容器电极层上形成电介质层,并在电介质层上形成第二电容器电极层。 该过程还可以包括检测缺陷并去除对应于缺陷的第二电容器电极层的第一部分,其中第二电容器电极层的第二部分保留在电介质层上。

    Packaging of multiple fluid receptacles
    10.
    发明授权
    Packaging of multiple fluid receptacles 有权
    多个液体容器的包装

    公开(公告)号:US07353953B2

    公开(公告)日:2008-04-08

    申请号:US10946477

    申请日:2004-09-21

    摘要: Packaged fluid receptacles include: a plurality of fluid receptacles arranged one next to the other to form a composite structure having a top surface, bottom surface and end walls at a first end and a second end and having a longitudinal axis which extends through the end walls; and a removable support which contacts at least the top surface, bottom surface and end walls, the removable support including an attachment for applying a force to remove the support, preferably in a direction along the longitudinal axis. In a preferred embodiment, the support is one-piece and has a single attachment. Preferably, the packaged fluid receptacles are cuvettes usable in a clinical analyzer. A method for inserting a plurality of cuvettes into a clinical analyzer includes: providing packaged cuvettes as described above; inserting the packaged cuvettes into a cuvette loading station of a clinical analyzer in a manner in which the tab remains accessible to application of a force; securing the packaged cuvettes in the loading station; applying a force to the tab to peel back the support from the cuvettes; and removing the support to provide individual cuvettes.

    摘要翻译: 封装的流体容器包括:多个彼此相邻布置的流体容器,以形成复合结构,该复合结构在第一端和第二端处具有顶表面,底表面和端壁,并且具有延伸穿过端壁的纵向轴线 ; 以及至少与顶表面,底表面和端壁相接触的可除去的支撑件,所述可除去的支撑件包括用于施加力以移除所述支撑件的附件,优选沿着所述纵向轴线的方向。 在优选实施例中,支撑件是一体的并且具有单个附件。 优选地,包装的流体容器是在临床分析器中可用的比色杯。 将多个比色皿插入临床分析器的方法包括:提供如上所述的包装的比色杯; 将包装的比色杯以临时分析仪的比色皿装载站插入,使得标签仍然可以通过施加力; 将包装的比色杯固定在装载站中; 向所述突片施加力以从所述比色皿剥离所述载体; 并移除支架以提供各自的比色皿。