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公开(公告)号:US20170047667A1
公开(公告)日:2017-02-16
申请号:US14854832
申请日:2015-09-15
申请人: BROADCOM CORPORATION
发明人: Saikat SARKAR , Seunghwan YOON , Bagher AFSHAR , Michael BOERS , Jesus CASTANEDA , Tirdad SOWLATI
摘要: An electronic device includes circuitry configured to determine an antenna operation mode for one or more antenna arrays. The circuitry is further configured to control the one or more antenna arrays to operate in a combined antenna mode via a Wilkinson combiner. The circuitry is also configured to control the one or more antenna arrays to operate in an isolated antenna mode via a single-pole, multi-throw switch.
摘要翻译: 电子设备包括被配置为确定一个或多个天线阵列的天线操作模式的电路。 电路还被配置成通过威尔金森组合器控制一个或多个天线阵列以组合天线方式工作。 该电路还被配置为通过单刀多掷开关来控制一个或多个天线阵列以隔离天线方式工作。
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公开(公告)号:US20180123245A1
公开(公告)日:2018-05-03
申请号:US15338265
申请日:2016-10-28
申请人: Broadcom Corporation
发明人: Ana PAPIÓ TODA , Seunghwan YOON , Leonard Thomas HALL , Chryssoula KYRIAZIDOU , Alfred GRAU BESOLI
CPC分类号: H01Q9/0414 , H01Q1/2291 , H01Q1/48 , H01Q5/385 , H01Q9/16 , H01Q21/0075
摘要: A broadband antenna element for wireless communications includes one or more radiator layers to receive an electrical signal and to transmit a polarized electromagnetic (EM) wave. A feed layer including a feeding mechanism feeds the electrical signal generated by a transmitter into the radiator layer. A ground layer is coupled to a ground potential of the transmitter. The one or more radiator layers, the feed layer, and the ground layer are conductor layers of a multilayer substrate that includes metal layers and dielectric layers. The antenna element transmits with a broad bandwidth centered at a frequency of about 60 GHz, and maintains the broad bandwidth and polarization purity for scan angles up to a predefined value.
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公开(公告)号:US20170199226A1
公开(公告)日:2017-07-13
申请号:US15051134
申请日:2016-02-23
申请人: Broadcom Corporation
CPC分类号: G01R1/0735 , G01R1/0416 , G01R31/2831 , H01P5/028 , H01P5/12
摘要: The present disclosure describes a semiconductor wafer testing environment for routing signals used for testing integrated circuits formed onto a semiconductor wafer. The semiconductor wafer testing environment includes a semiconductor wafer tester to control overall operation and/or configuration of the semiconductor wafer testing environment and a semiconductor wafer prober to test the integrated circuits formed onto the semiconductor wafer. The semiconductor wafer prober includes a probe card having a transmission line coupler formed onto a flexible substrate. The transmission line coupler includes multiple transmission line coupling blocks that extend radially from a central point of the flexible substrate in a circular manner.
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