公开(公告)号：US20060233291A1

公开(公告)日：2006-10-19

申请号：US11404502

申请日：2006-04-14

申请人： Bruno Garlepp ,  Jared Zerbe ,  Metha Jeeradit ,  Vladimir Stojanovic

发明人： Bruno Garlepp ,  Jared Zerbe ,  Metha Jeeradit ,  Vladimir Stojanovic

IPC分类号： H04L7/00

CPC分类号： H04L25/03057 ,  H04L7/0276 ,  H04L25/063 ,  H04L25/497 ,  H04L2025/03369 ,  H04L2025/03503

摘要： In a receive circuit within an integrated circuit device, a binary input signal is sampled in response to transitions of a sampling clock signal to generate a set of data samples. The binary input signal is additionally compared with first and second threshold levels to generate respective first and second edge samples. The phase of the sampling clock signal is adjusted based, at least in part, on the first edge sample if the set of data samples matches a first data pattern and based, at least in part, on the second edge sample if the set of data samples matches a second data pattern.

摘要翻译： 在集成电路器件内的接收电路中，响应于采样时钟信号的转变对二进制输入信号进行采样以产生一组数据采样。 另外将二进制输入信号与第一和第二阈值电平进行比较以产生相应的第一和第二边缘采样。 至少部分地基于第一边缘采样来调整采样时钟信号的相位，如果该组数据样本与第一数据模式匹配，并且至少部分地基于第二边缘采样，如果数据集合 样本匹配第二个数据模式。

公开(公告)号：US20050111585A1

公开(公告)日：2005-05-26

申请号：US10966070

申请日：2004-10-18

申请人： Vladimir Stojanovic ,  Mark Horowitz ,  Jared Zerbe ,  Anthony Bessios ,  Andrew Ho ,  Jason Wei ,  Grace Tsang ,  Bruno Garlepp

发明人： Vladimir Stojanovic ,  Mark Horowitz ,  Jared Zerbe ,  Anthony Bessios ,  Andrew Ho ,  Jason Wei ,  Grace Tsang ,  Bruno Garlepp

IPC分类号： H04L25/06 ,  H04L25/497 ,  G11B5/09

CPC分类号： H04L25/03057 ,  H04L7/0276 ,  H04L25/063 ,  H04L25/497 ,  H04L2025/03369 ,  H04L2025/03503

摘要： A receive circuit for receiving a signal transmitted via an electric signal conductor. A first sampling circuit generates a first sample value that indicates whether the signal exceeds a first threshold level, and a second sampling circuit generates a second sample value that indicates whether the signal exceeds a second threshold level. A first select circuit receives the first and second sample values from the first and second sampling circuits and selects, according to a previously generated sample value, either the first sample value or the second sample value to be output as a selected sample value.

摘要翻译： 用于接收经由电信号导体发送的信号的接收电路。 第一采样电路产生指示信号是否超过第一阈值电平的第一采样值，并且第二采样电路产生指示信号是否超过第二阈值电平的第二采样值。 第一选择电路从第一和第二采样电路接收第一和第二采样值，并根据先前产生的采样值选择作为选择的采样值输出的第一采样值或第二采样值。

公开(公告)号：US20080049822A1

公开(公告)日：2008-02-28

申请号：US11871666

申请日：2007-10-12

申请人： Jared Zerbe ,  Vladimir Stojanovic ,  Fred Chen

发明人： Jared Zerbe ,  Vladimir Stojanovic ,  Fred Chen

IPC分类号： H04L27/01

CPC分类号： H04L25/03019 ,  H04B1/1081 ,  H04L7/0058 ,  H04L7/0087 ,  H04L7/0331 ,  H04L25/03025 ,  H04L25/03038 ,  H04L25/03057 ,  H04L25/03343 ,  H04L25/03885

摘要： A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.

摘要翻译： 一种具有可选择抽头均衡器的信令电路。 信令电路包括缓冲器，选择电路和均衡电路。 缓冲器用于存储对应于在第一时间间隔期间在信令路径上发送的数据信号的多个数据值。 选择电路耦合到缓冲器，以根据选择值从多个数据值中选择数据值的子集。 均衡电路被耦合以从选择电路接收数据值的子集，并且适于根据数据值的子集来调整对应于在第二时间间隔期间在信令路径上发送的数据信号的信号电平。

公开(公告)号：US20060133538A1

公开(公告)日：2006-06-22

申请号：US11022469

申请日：2004-12-22

申请人： Vladimir Stojanovic ,  Amir Amirkhany ,  Jared Zerbe

发明人： Vladimir Stojanovic ,  Amir Amirkhany ,  Jared Zerbe

IPC分类号： H04L27/20 ,  H04L27/22

CPC分类号： H04L27/2637 ,  H04L5/06 ,  H04L27/2653

摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.

公开(公告)号：US20060133523A1

公开(公告)日：2006-06-22

申请号：US11022468

申请日：2004-12-22

申请人： Vladimir Stojanovic ,  Amir Amirkhany ,  Jared Zerbe

发明人： Vladimir Stojanovic ,  Amir Amirkhany ,  Jared Zerbe

IPC分类号： H04K1/10 ,  H04L27/20

CPC分类号： H04L25/03343 ,  H04L27/2637

摘要： A multi-tone system includes a data transmission circuit with an interface for receiving a data stream for transmission, a data steam splitter that splits the data stream to produce multiple substreams and a plurality of parallel data preparation circuits. Each data preparation circuit prepares a respective substream for transmission and generates a respective sub-channel signal. At least a first data preparation circuit of the plurality of parallel data preparation circuits includes a first analog filter for filtering a first substream. The first analog filter operates at a sample rate greater than the respective symbol rate of the first substream. The first analog filter provides pre-emphasis of the respective sub-channel signal and attenuation of signals outside of a respective band of frequencies corresponding to the respective sub-channel signal. The data transmission circuit also includes a combiner for combining respective sub-channel signals to generate a data transmission signal.

摘要翻译： 多音系统包括具有用于接收用于传输的数据流的接口的数据传输电路，分割数据流以产生多个子流的数据蒸汽分配器和多个并行数据准备电路。 每个数据准备电路准备相应的子流进行传输，并产生相应的子信道信号。 多个并行数据准备电路的至少第一数据准备电路包括用于对第一子流进行滤波的第一模拟滤波器。 第一模拟滤波器以大于第一子流的相应符号率的采样率操作。 第一模拟滤波器提供相应子信道信号的预加重和对应于相应子信道信号的相应频带之外的信号的衰减。 数据传输电路还包括用于组合各个子信道信号以产生数据传输信号的组合器。

公开(公告)号：US20050134307A1

公开(公告)日：2005-06-23

申请号：US10875086

申请日：2004-06-23

申请人： Vladimir Stojanovic ,  Andrew Ho ,  Fred Chen ,  Bruno Garlepp

发明人： Vladimir Stojanovic ,  Andrew Ho ,  Fred Chen ,  Bruno Garlepp

IPC分类号： H03K19/003 ,  H04L25/02 ,  H04L25/03 ,  H04L25/06 ,  H04L25/49

CPC分类号： H04L25/03057 ,  H04L25/028 ,  H04L25/0292 ,  H04L25/03343 ,  H04L25/061 ,  H04L25/4906

摘要： A receive circuit having a sampling circuit and a threshold generating circuit. The sampling circuit generates a first sample value having either a first state or a second state according whether an incoming signal exceeds a first threshold level, the first threshold level corresponding to a first threshold value. The threshold generating circuit combines a first control value and a second control value to generate the first threshold value and provides the first threshold value to the sampling circuit.

摘要翻译： 具有采样电路和阈值产生电路的接收电路。 采样电路根据输入信号是否超过第一阈值电平，生成具有第一状态或第二状态的第一采样值，第一阈值电平对应于第一阈值。 阈值产生电路组合第一控制值和第二控制值以产生第一阈值，并将第一阈值提供给采样电路。

公开(公告)号：US20070058744A1

公开(公告)日：2007-03-15

申请号：US11557101

申请日：2006-11-06

申请人： Amir Amirkhany ,  Vladimir Stojanovic ,  Elad Alon ,  Jared Zerbe ,  Mark Horowitz

发明人： Amir Amirkhany ,  Vladimir Stojanovic ,  Elad Alon ,  Jared Zerbe ,  Mark Horowitz

IPC分类号： H04K1/10 ,  H04J11/00 ,  G06F17/14

CPC分类号： G06F17/141 ,  G06J1/005

摘要： A transform circuit includes a first circuit and a second circuit. The first circuit and the second circuit implement first and second mappings that together generate a pre-defined transform of N digital data symbols. The first circuit maps a set of N digital data symbols from N parallel data streams to N analog data symbols by generating N sets of first weighted sums of the N digital data symbols. Each respective first weighted sum is defined by a respective set of pre-determined first weighting values in a first matrix. The second circuit maps the N analog data symbols to a sequence of N output signals over N time intervals. Each of the N output signals corresponds to a respective second weighted sum of the N analog data symbols. Each respective second weighted sum is defined by a respective set of pre-determined second weighting values in a second matrix.

摘要翻译： 变换电路包括第一电路和第二电路。 第一电路和第二电路实现一起产生N个数字数据符号的预定义变换的第一和第二映射。 第一电路通过产生N个数字数据符号的第一加权和的N组，将来自N个并行数据流的一组N个数字数据符号映射到N个模拟数据符号。 每个相应的第一加权和由第一矩阵中的预定的第一加权值的相应集合来定义。 第二电路在N个时间间隔内将N个模拟数据符号映射到N个输出信号的序列。 N个输出信号中的每一个对应于N个模拟数据符号的相应的第二加权和。 每个相应的第二加权和由第二矩阵中的预定的第二加权值的相应集合来定义。

公开(公告)号：US20060132339A1

公开(公告)日：2006-06-22

申请号：US11015971

申请日：2004-12-17

申请人： Elad Alon ,  Bruno Garlepp ,  Vladimir Stojanovic ,  Andrew Ho ,  Fred Chen

发明人： Elad Alon ,  Bruno Garlepp ,  Vladimir Stojanovic ,  Andrew Ho ,  Fred Chen

IPC分类号： H03M1/10

CPC分类号： H03M1/1023

摘要： An integrated circuit device includes one or more calibration paths including one or more devices. A signal generator is coupled to at least one calibration path and configured to provide the calibration path with a calibration signal having known characteristics. A controller is coupled to the signal generator and the calibration path and configured to adjust the signal generator and at least one parameter associated with at least one device in the calibration path.

摘要翻译： 集成电路装置包括包括一个或多个装置的一个或多个校准路径。 信号发生器耦合到至少一个校准路径并且被配置为向校准路径提供具有已知特征的校准信号。 控制器耦合到信号发生器和校准路径并且被配置为调整信号发生器和与校准路径中的至少一个设备相关联的至少一个参数。

公开(公告)号：US07672380B2

公开(公告)日：2010-03-02

申请号：US11895415

申请日：2007-08-23

申请人： Andrew Ho ,  Vladimir Stojanovic ,  Fred F. Chen ,  Elad Alon ,  Mark A. Horowitz

发明人： Andrew Ho ,  Vladimir Stojanovic ,  Fred F. Chen ,  Elad Alon ,  Mark A. Horowitz

IPC分类号： H04B3/00 ,  H04B1/10 ,  H03D1/04 ,  H04L5/16

CPC分类号： H04L47/10 ,  H04L5/20 ,  H04L25/0276

摘要： Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily rejected by differential receivers, thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit backchannel signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.

摘要翻译： 描述了通过相同的差分通道传送差分和共模信号的通信系统。 耐噪声通信方案使用容易被差分接收机拒绝的低振幅共模信号，从而允许非常高的差分数据速率。 一些实施例采用共模信号来发送用于调整差分发射机的特性的反向信道信号。 即使前向信道发射机被调整不正确，接收到的差分数据是无法识别的，反向信道控制信号也被有效地传送。 根据上述实施例的系统在没有附加引脚或通信信道的情况下获得这些优点，并且与AC耦合和DC耦合通信信道兼容。 数据编码方案和相应的数据恢复电路不需要复杂的高速CDR电路。

公开(公告)号：US07292637B2

公开(公告)日：2007-11-06

申请号：US10739823

申请日：2003-12-17

申请人： Andrew Ho ,  Vladimir Stojanovic ,  Fred F. Chen ,  Elad Alon ,  Mark A. Horowitz

发明人： Andrew Ho ,  Vladimir Stojanovic ,  Fred F. Chen ,  Elad Alon ,  Mark A. Horowitz

IPC分类号： H04B3/00 ,  H04B1/10 ,  H04B1/18 ,  H03D1/04

CPC分类号： H04L47/10 ,  H04L5/20 ,  H04L25/0276

摘要： Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily rejected by differential receivers, thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit backchannel signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.

摘要翻译： 描述了通过相同的差分通道传送差分和共模信号的通信系统。 耐噪声通信方案使用容易被差分接收机拒绝的低振幅共模信号，从而允许非常高的差分数据速率。 一些实施例采用共模信号来发送用于调整差分发射机的特性的反向信道信号。 即使前向信道发射机被调整不正确，接收到的差分数据是无法识别的，反向信道控制信号也被有效地传送。 根据上述实施例的系统在没有附加引脚或通信信道的情况下获得这些优点，并且与AC耦合和DC耦合通信信道兼容。 数据编码方案和相应的数据恢复电路不需要复杂的高速CDR电路。