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    Simultaneous transmission and reception of signals in different frequency bands over a bus line
    2.
    发明授权
    Simultaneous transmission and reception of signals in different frequency bands over a bus line 有权
    在总线上同时发送和接收不同频段的信号

    公开(公告)号：US07177288B2

    公开(公告)日：2007-02-13

    申请号：US09998008

    申请日：2001-11-28

    申请人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    发明人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    IPC分类号： H04L5/14

    CPC分类号： H04L5/1423

    摘要： A device includes a bus, a first transmitter connected to the bus and configured to transmit a first signal over the bus in a first frequency band, a second transmitter connected to the bus and configured to transmit a second signal over the bus in a second frequency band at the same time that the first transmitter is transmitting the first signal, a first receiver connected to the bus and configured to receive the first signal transmitted over the bus in the first frequency band, and a second receiver connected to the bus and configured to receive the second signal transmitted over the bus in the second frequency band. The first frequency band and the second frequency band occupy different portions of the frequency spectrum.

    摘要翻译： 一种设备包括总线，连接到总线的第一发射机，并且被配置为在第一频带中通过总线传输第一信号，第二发射器连接到总线并且被配置为以第二频率通过总线发送第二信号 与第一发射机正在发送第一信号的同时，连接到总线并被配置为接收通过总线在第一频带中发送的第一信号的第一接收机和连接到总线的第二接收机，并且被配置为 接收在第二频带中通过总线发送的第二信号。 第一频带和第二频带占据频谱的不同部分。

    Voltage margin testing of a transmission line analog signal using a variable offset comparator in a data receiver circuit
    3.
    发明授权
    Voltage margin testing of a transmission line analog signal using a variable offset comparator in a data receiver circuit 失效
    在数据接收器电路中使用可变偏移比较器的传输线模拟信号的电压裕度测试

    公开(公告)号：US06653893B2

    公开(公告)日：2003-11-25

    申请号：US09967666

    申请日：2001-09-28

    申请人： Bryan K. Casper ,  Stephen R. Mooney ,  Matthew B. Haycock

    发明人： Bryan K. Casper ,  Stephen R. Mooney ,  Matthew B. Haycock

    IPC分类号： H03F345

    CPC分类号： H03F3/45183 ,  H03F3/45672 ,  H03F2203/45371

    摘要： A data receiver circuit having a comparator that exhibits substantially variable offset that is controllable to represent a variable reference level, without a separate input to receive a reference voltage level. The comparator output provides an indication of the comparison between a fixed voltage level applied to its differential signal input and the variable reference level. While changing an offset code that is fed to an offset control input of the comparator, and while applying a fixed voltage level that represents a symbol in the transmission line analog signal, a value of the offset code which causes the output of the comparator to change states is captured. A similar process may be repeated for different symbol values that can be transmitted, such that an indication of the voltage margin may be obtained as a difference between two captured offset codes. Circuitry to perform the process may be provided on-chip to the receiver circuit.

    摘要翻译： 一种具有比较器的数据接收器电路，其具有可变的偏移，其可控制以表示可变参考电平，而没有单独的输入以接收参考电压电平。 比较器输出提供了施加到其差分信号输入的固定电压电平与可变参考电平之间的比较的指示。 在改变馈送到比较器的偏移控制输入的偏移代码的同时，在施加表示传输线模拟信号中的符号的固定电压电平的同时，使比较器的输出变化的偏移代码的值 状态被捕获。 可以对可以发送的不同符号值重复类似的过程，使得可以获得电压余量的指示作为两个所捕获的偏移码之间的差。 执行该处理的电路可以片上提供给接收器电路。

    Memory pass-band signaling
    8.
    发明授权
    Memory pass-band signaling 有权
    存储器通带信令

    公开(公告)号：US06845424B2

    公开(公告)日：2005-01-18

    申请号：US10062034

    申请日：2002-01-31

    申请人： Bryan K. Casper ,  Shekhar Y. Borkar ,  Stephen R. Mooney ,  Aaron K. Martin ,  Joseph T. Kennedy ,  Matthew B. Haycock ,  James E. Jaussi

    发明人： Bryan K. Casper ,  Shekhar Y. Borkar ,  Stephen R. Mooney ,  Aaron K. Martin ,  Joseph T. Kennedy ,  Matthew B. Haycock ,  James E. Jaussi

    IPC分类号： G06F12/06 ,  G06F12/00

    CPC分类号： G06F12/06

    摘要： A memory system provides includes multiple memory devices or banks of memory devices that are assigned frequency pass-bands. Each memory device includes frequency translation circuitry to up-convert and down-convert data signals to and from the assigned frequency pass-band. Some embodiments include simultaneous bidirectional communications between memory devices and a controller by assigning multiple frequency pass-bands to each memory device or bank of memory devices. A memory system substrate is provided with bandpass filters between memory device footprints and other device footprints.

    摘要翻译： 存储器系统提供包括分配有频率通带的多个存储器件或存储器器件组。 每个存储器件包括频率转换电路，用于将数据信号上变频和下转换到分配的频率通带。 一些实施例包括通过将多个频率通带分配给每个存储器件或存储器组来同时在存储器件与控制器之间进行双向通信。 存储器系统基板在存储器件占用面积和其它器件占用面积之间提供带通滤波器。

    INTEGRATED CIRCUIT PASSIVE SIGNAL DISTRIBUTION
    9.
    发明申请
    INTEGRATED CIRCUIT PASSIVE SIGNAL DISTRIBUTION 有权
    集成电路被动信号分配

    公开(公告)号：US20120281323A1

    公开(公告)日：2012-11-08

    申请号：US13540500

    申请日：2012-07-02

    申请人： Frank O'Mahony ,  Bryan Casper ,  James Jaussi ,  Matthew B. Haycock ,  Joseph Kennedy ,  Mozhgan Mansuri ,  Stephen R. Mooney

    发明人： Frank O'Mahony ,  Bryan Casper ,  James Jaussi ,  Matthew B. Haycock ,  Joseph Kennedy ,  Mozhgan Mansuri ,  Stephen R. Mooney

    IPC分类号： H02H9/04

    CPC分类号： H04L25/0278 ,  H03K5/15013 ,  H04L25/0292 ,  H04L25/0298

    摘要： For one disclosed embodiment, an integrated circuit may comprise an internal transmission line in one or more layers of the integrated circuit. The internal transmission line may be coupled to receive a signal from an external transmission line at a first end of the internal transmission line without use of termination circuitry. The internal transmission line may transmit the signal passively to a second end of the internal transmission line. The integrated circuit may also comprise first circuitry having an input coupled to the internal transmission line at a first location of the internal transmission line to receive the signal and second circuitry having an input coupled to the internal transmission line at a second location of the internal transmission line to receive the signal. The second location may be different from the first location. Other embodiments are also disclosed.

    摘要翻译： 对于一个公开的实施例，集成电路可以包括集成电路的一个或多个层中的内部传输线。 内部传输线可以被耦合以在内部传输线的第一端处接收来自外部传输线的信号，而不使用终端电路。 内部传输线路可以将信号被动地发送到内部传输线路的第二端。 集成电路还可以包括第一电路，其具有在内部传输线的第一位置处耦合到内部传输线的输入以接收信号，并且第二电路具有在内部传输的第二位置处耦合到内部传输线的输入 线接收信号。 第二位置可以不同于第一位置。 还公开了其他实施例。

    Integrated circuit passive signal distribution
    10.
    发明授权
    Integrated circuit passive signal distribution 有权
    集成电路无源信号分配

    公开(公告)号：US08213894B2

    公开(公告)日：2012-07-03

    申请号：US11323370

    申请日：2005-12-29

    申请人： Frank O'Mahony ,  Bryan Casper ,  James Jaussi ,  Matthew B. Haycock ,  Joseph Kennedy ,  Mozhgan Mansuri ,  Stephen R. Mooney

    发明人： Frank O'Mahony ,  Bryan Casper ,  James Jaussi ,  Matthew B. Haycock ,  Joseph Kennedy ,  Mozhgan Mansuri ,  Stephen R. Mooney

    IPC分类号： H04B1/28

    CPC分类号： H04L25/0278 ,  H03K5/15013 ,  H04L25/0292 ,  H04L25/0298

    摘要： For one disclosed embodiment, an integrated circuit may comprise an internal transmission line in one or more layers of the integrated circuit. The internal transmission line may be coupled to receive a signal from an external transmission line at a first end of the internal transmission line without use of termination circuitry. The internal transmission line may transmit the signal passively to a second end of the internal transmission line. The integrated circuit may also comprise first circuitry having an input coupled to the internal transmission line at a first location of the internal transmission line to receive the signal and second circuitry having an input coupled to the internal transmission line at a second location of the internal transmission line to receive the signal. The second location may be different from the first location. Other embodiments are also disclosed.

    摘要翻译： 对于一个公开的实施例，集成电路可以包括集成电路的一个或多个层中的内部传输线。 内部传输线可以被耦合以在内部传输线的第一端处接收来自外部传输线的信号，而不使用终端电路。 内部传输线路可以将信号被动地发送到内部传输线路的第二端。 集成电路还可以包括第一电路，其具有在内部传输线的第一位置处耦合到内部传输线的输入以接收信号，并且第二电路具有在内部传输的第二位置处耦合到内部传输线的输入 线接收信号。 第二位置可以不同于第一位置。 还公开了其他实施例。