Synchronous transfer mode-256 adder/dropper
    1.
    发明授权
    Synchronous transfer mode-256 adder/dropper 有权
    同步传输模式 - 256加法器/放大器

    公开(公告)号:US07327767B2

    公开(公告)日:2008-02-05

    申请号:US10695734

    申请日:2003-10-23

    IPC分类号: H04J14/00

    CPC分类号: H04J3/08 H04J2203/0042

    摘要: A synchronous transfer mode (STM)-256 adder/dropper which provides a communication path between STM-64 optical channels in an apparatus of multiplexing STM-64 optical channels into STM-256 electrical signals, is provided. The STM-256 adder/dropper transmits STM signals by multiplexing the STM signals at a low speed and simultaneously provides a communication path between lower channels.

    摘要翻译: 提供了在将STM-64光通道复用为STM-256电信号的装置中的STM-64光信道之间提供通信路径的同步传输模式(STM)-256加法器/缓冲器。 STM-256加法器/缓冲器通过以低速复用STM信号来发送STM信号,同时提供下级信道之间的通信路径。

    Light emitting diode package and light emitting module comprising the same
    3.
    发明授权
    Light emitting diode package and light emitting module comprising the same 有权
    发光二极管封装和包含该发光二极管封装的发光模块

    公开(公告)号:US08692282B2

    公开(公告)日:2014-04-08

    申请号:US13340867

    申请日:2011-12-30

    IPC分类号: H01L33/00

    摘要: Exemplary embodiments of the present invention provide a light emitting diode package including a light emitting diode chip, a lead frame having a chip area on which the light emitting diode chip is arranged, and a package body supporting the lead frame. The lead frame includes a first terminal group arranged at a first side of the chip area and a second terminal group arranged at a second side of the chip area. The first terminal group and the second terminal group each include a first terminal and a second terminal, and in at least one of the first terminal group and the second terminal group, the first terminal is connected to the chip area and the second terminal is separated from the chip area. The first terminal has a first width, the second terminal has a second width, and the first width is different than the second width.

    摘要翻译: 本发明的示例性实施例提供一种包括发光二极管芯片的发光二极管封装,其上布置有发光二极管芯片的芯片区域的引线框架和支撑引线框架的封装体。 引线框架包括布置在芯片区域的第一侧的第一端子组和布置在芯片区域的第二侧的第二端子组。 第一端子组和第二端子组各自包括第一端子和第二端子,并且在第一端子组和第二端子组中的至少一个中,第一端子连接到芯片区域,并且第二端子被分离 从芯片区域。 第一端子具有第一宽度,第二端子具有第二宽度,并且第一宽度不同于第二宽度。