公开(公告)号：US20080100560A1

公开(公告)日：2008-05-01

申请号：US11928466

申请日：2007-10-30

申请人： Byoung-Sun NA ,  Dong-Hyeon KI ,  Min-Cheol LEE ,  Soon-Il AHN

发明人： Byoung-Sun NA ,  Dong-Hyeon KI ,  Min-Cheol LEE ,  Soon-Il AHN

IPC分类号： G09G3/36

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2320/0219 ,  G09G2320/041

摘要： In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.

摘要翻译： 在具有栅极驱动电路的栅极驱动电路和显示装置中，将多个相互依次连接并依次输出栅极信号的多级中的当前级的上拉晶体管拉起当前的栅极信号 通过输出端子输出到栅极导通电压。 缓冲晶体管连接到上拉晶体管的控制端，以接收来自前一级的先前输出信号并接通上拉晶体管。 缓冲晶体管具有的电荷率约为上拉晶体管的充电能力的两倍或更大。 因此，可以减小上拉晶体管的尺寸，从而当栅极驱动电路在高温或低温条件下工作时，防止栅极驱动电路的故障。

公开(公告)号：US20100026669A1

公开(公告)日：2010-02-04

申请号：US12509679

申请日：2009-07-27

申请人： Min-Cheol LEE ,  Hyung-Guel KIM ,  Jin JEON

发明人： Min-Cheol LEE ,  Hyung-Guel KIM ,  Jin JEON

IPC分类号： G09G5/00 ,  G11C19/00 ,  H01L21/77

CPC分类号： G09G3/3677 ,  G02F1/1368 ,  G11C19/184 ,  G11C19/28

摘要： A gate driving circuit having improved driving capability and maintaining reliability even after a prolonged period of use includes a shift register having a plurality of stages cascaded to one another, each of the plurality of stages including a pull-up unit, a pull-down unit, a discharging unit, and a holding unit, wherein at least one of the discharging unit and the holding unit includes an amorphous silicon thin film transistor and a polysilicon thin film transistor connected in parallel to each other.

摘要翻译： 具有改善的驱动能力并且即使在长时间使用之后也保持可靠性的栅极驱动电路包括具有彼此级联的多个级的移位寄存器，所述多个级中的每一级包括上拉单元，下拉单元 放电单元和保持单元，其中放电单元和保持单元中的至少一个包括彼此并联连接的非晶硅薄膜晶体管和多晶硅薄膜晶体管。

公开(公告)号：US20110205462A1

公开(公告)日：2011-08-25

申请号：US13097579

申请日：2011-04-29

申请人： Min-Cheol LEE

发明人： Min-Cheol LEE

IPC分类号： G02F1/1343

CPC分类号： G09G3/3659 ,  G02F1/136213 ,  G09G3/3648 ,  G09G3/3655 ,  G09G2300/0443 ,  G09G2320/028

摘要： A liquid crystal display includes a first gate electrode, a storage electrode having a body and an extension, a first semiconductor formed on a gate insulating layer, a first drain electrode formed on the first semiconductor, separated from a first source electrode, and having an end portion overlapping the first gate electrode, and an expansion overlapping the body of the storage electrode and distanced from the end portion with a connection connecting the end portion and the expansion and overlapping the extension of the storage electrode, a passivation layer having a contact hole exposing the expansion of the first drain electrode, and a first field-generating electrode connected to the first drain electrode through the contact hole.

摘要翻译： 液晶显示器包括第一栅电极，具有本体和延伸部的存储电极，形成在栅极绝缘层上的第一半导体，形成在第一半导体上的第一漏电极，与第一源电极分离，并且具有 端部与第一栅电极重叠，并且膨胀与存储电极的主体重叠并且与端部间隔开，连接端部和扩展部并且与存储电极的延伸部重叠;钝化层，具有接触孔 暴露第一漏电极的膨胀，以及通过接触孔连接到第一漏电极的第一场产生电极。

公开(公告)号：US20100156869A1

公开(公告)日：2010-06-24

申请号：US12645902

申请日：2009-12-23

申请人： Min-Cheol LEE ,  Seung-Hwan MOON

发明人： Min-Cheol LEE ,  Seung-Hwan MOON

IPC分类号： G09G3/36 ,  H03B1/00 ,  G09G5/00

CPC分类号： G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

摘要： A gate driving device includes a plurality of stages, a first dummy stage connected to the plurality of stages and a second dummy stage connected to the first dummy stage. Stages of the plurality of stages are cascaded. The first dummy stage includes a first charge unit which receives a first input signal from a previous stage of the plurality of stages and is thereby charged, and a first pull-up transistor which outputs a clock signal when the first charge unit reaches a first charge level. The second dummy stage includes a second charge unit which receives a second input signal from the first dummy stage and is thereby charged, and a second pull-up transistor which outputs the clock signal when the second charge unit reaches a second charge level higher than the first charge level.

摘要翻译： 栅极驱动装置包括多个级，连接到多个级的第一虚拟级和连接到第一虚拟级的第二虚拟级。 多级的阶段是级联的。 第一虚拟级包括第一充电单元，其接收来自多级的前一级的第一输入信号并由此充电;以及第一上拉晶体管，其在第一充电单元达到第一充电时输出时钟信号 水平。 第二虚拟级包括第二充电单元，其从第一虚拟级接收第二输入信号并由此被充电;以及第二上拉晶体管，当第二充电单元达到比第二充电电平高的第二充电电平时，输出时钟信号 第一充电水平。

公开(公告)号：US20130027287A1

公开(公告)日：2013-01-31

申请号：US13644685

申请日：2012-10-04

申请人： Min-Cheol LEE ,  Byeong-Jae AHN ,  Jong-Hwan LEE ,  Yeon-Kyu MOON ,  Jong-Hyuk LEE

发明人： Min-Cheol LEE ,  Byeong-Jae AHN ,  Jong-Hwan LEE ,  Yeon-Kyu MOON ,  Jong-Hyuk LEE

IPC分类号： G09G3/36

CPC分类号： G09G3/3674 ,  G09G2310/0286 ,  G11C19/182

摘要： A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.

摘要翻译： 显示装置包括：栅极驱动器，其响应于栅极控制信号顺序地输出处于高状态的栅极信号;以及数据驱动器，其响应于数据控制信号将图像数据转换为数据信号。 显示装置还包括显示面板，其包括顺序地接收栅极信号的多个栅极线，接收数据信号的多个数据线和连接到栅极和数据线的多个像素，并且接收数据信号 响应于门信号显示图像。 在门信号转换到低电平状态之后，数据信号的极性反转。

公开(公告)号：US20100039363A1

公开(公告)日：2010-02-18

申请号：US12507316

申请日：2009-07-22

申请人： Min-Cheol LEE ,  Yong-Soon LEE

发明人： Min-Cheol LEE ,  Yong-Soon LEE

IPC分类号： G09G3/36

CPC分类号： G09G3/3674 ,  G02F1/13454 ,  G09G3/3266 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2360/16 ,  G11C19/28

摘要： A gate driving circuit that may be capable of improving driving margin and maintaining reliability even after long use, and a display device having the gate driving circuit. The gate driving circuit includes a shift register having a plurality of stages dependently connected to one another, wherein each stage includes a pull-up unit outputting a first clock signal as a gate signal in response to a signal of a first node, to which a first input signal is applied, a pull-down unit discharging the gate signal to a gate-off voltage in response to a second input signal, a discharging unit discharging the signal of the first node to the gate-off voltage in response to the second input signal, and a holding unit maintaining the signal of the first node at the gate-off voltage in response to a delay signal of the first clock signal.

摘要翻译： 一种能够在长时间使用后能够提高驱动余量并保持可靠性的栅极驱动电路，以及具有栅极驱动电路的显示装置。 栅极驱动电路包括具有相互依次连接的多个级的移位寄存器，其中每一级包括上拉单元，其响应于第一节点的信号而将第一时钟信号作为门信号输出， 施加第一输入信号，下拉单元响应于第二输入信号将门信号放电到栅极截止电压，放电单元响应于第二输入信号将第一节点的信号放电到栅极截止电压 输入信号和保持单元，其响应于第一时钟信号的延迟信号而将第一节点的信号保持在栅极截止电压。

公开(公告)号：US20090040161A1

公开(公告)日：2009-02-12

申请号：US12145140

申请日：2008-06-24

申请人： Seung-Soo BAEK ,  Yong-Soon LEE ,  Min-Cheol LEE ,  Seong-Young LEE

发明人： Seung-Soo BAEK ,  Yong-Soon LEE ,  Min-Cheol LEE ,  Seong-Young LEE

IPC分类号： G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/3614 ,  G09G3/3659 ,  G09G3/3677 ,  G09G2300/0814 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2310/06 ,  G09G2320/0219 ,  G09G2320/0223 ,  G09G2320/0252 ,  G09G2320/0276 ,  G09G2320/028 ,  G11C19/28 ,  H03K5/15093

摘要： A display apparatus includes a panel part having a plurality of gate lines, a plurality of data lines, a plurality of pixels, a data driver and a gate driver part. Each pixel of the plurality of pixels includes a first sub-pixel and a second sub-pixel. The first sub-pixel is connected to a first gate line of the plurality of gate lines and the second sub-pixel is connected to a second gate line of the plurality of gate lines. The first sub-pixel and the second sub-pixel are each commonly connected to one data line of the plurality of data lines. The gate driver part is disposed on the panel part and applies a plurality of gate signals to the plurality of gate lines. A current gate signal of the plurality of gate signals is temporally overlapped with a previous gate signal for a predetermined time interval.

摘要翻译： 显示装置包括具有多条栅极线，多条数据线，多个像素，数据驱动器和栅极驱动器部分的面板部分。 多个像素中的每个像素包括第一子像素和第二子像素。 第一子像素连接到多条栅极线的第一栅极线，第二子像素连接到多条栅极线的第二栅极线。 第一子像素和第二子像素都共同连接到多条数据线中的一条数据线。 栅极驱动器部分设置在面板部分上，并且对多个栅极线施加多个栅极信号。 多个门信号的当前门信号在预定的时间间隔内与先前的门信号暂时重叠。

公开(公告)号：US20080218502A1

公开(公告)日：2008-09-11

申请号：US11960131

申请日：2007-12-19

申请人： Min-Cheol LEE ,  Byeong-Jae AHN ,  Jong-Hwan LEE ,  Yeon-Kyu MOON ,  Jong-Hyuk LEE

发明人： Min-Cheol LEE ,  Byeong-Jae AHN ,  Jong-Hwan LEE ,  Yeon-Kyu MOON ,  Jong-Hyuk LEE

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3674 ,  G09G2310/0286 ,  G11C19/182

摘要： A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.

摘要翻译： 显示装置包括：栅极驱动器，其响应于栅极控制信号顺序地输出处于高状态的栅极信号;以及数据驱动器，其响应于数据控制信号将图像数据转换为数据信号。 显示装置还包括显示面板，其包括顺序地接收栅极信号的多个栅极线，接收数据信号的多个数据线和连接到栅极和数据线的多个像素，并且接收数据信号 响应于门信号显示图像。 在门信号转换到低电平状态之后，数据信号的极性反转。