Adjustable selectivity etching solutions and methods of etching
semiconductor devices using the same
    1.
    发明授权
    Adjustable selectivity etching solutions and methods of etching semiconductor devices using the same 失效
    可选择的蚀刻溶液和使用其的半导体器件的蚀刻方法

    公开(公告)号:US6117350A

    公开(公告)日:2000-09-12

    申请号:US684034

    申请日:1996-07-19

    CPC分类号: H01L21/02052 H01L21/31111

    摘要: Solutions useful for etching semiconductor devices comprise ammonium fluoride, hydrofluoric acid, hydrogen peroxide, and water. Processes for forming the solutions comprise mixing first solutions which comprise ammonium fluoride, hydrofluoric acid, and water with second solutions which comprise hydrogen peroxide and water to form the solutions of the invention. Methods for etching semiconductor devices comprise contacting the devices which comprise a substrate and oxide layer thereon with the solutions of the invention to etch the devices. The oxide layer, for example a damaged silicon oxide layer on a silicon substrate, is selectively etched to the substrate.

    摘要翻译: 用于蚀刻半导体器件的解决方案包括氟化铵,氢氟酸,过氧化氢和水。 用于形成溶液的方法包括将包含氟化铵,氢氟酸和水的第一溶液与包含过氧化氢和水的第二溶液混合以形成本发明的溶液。 蚀刻半导体器件的方法包括将包括衬底和氧化物层的器件与本发明的溶液接触以蚀刻器件。 氧化物层,例如硅衬底上的损坏的氧化硅层被选择性地蚀刻到衬底上。

    Method of manufacturing a semiconductor device
    2.
    发明授权
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US07151043B2

    公开(公告)日:2006-12-19

    申请号:US11082616

    申请日:2005-03-17

    IPC分类号: H01L21/76

    摘要: Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.

    摘要翻译: 提供制造半导体器件的方法。 在半导体衬底中形成沟槽。 形成部分填充沟槽的第一场氧化物层。 第一场氧化物层限定与沟槽相邻的衬底的有源区。 沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。 第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。 在第一衬垫上形成第二场氧化物层并填充沟槽。 每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。 介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。 在电介质层上形成栅电极。

    Method of manufacturing a semiconductor device
    3.
    发明申请
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US20050266647A1

    公开(公告)日:2005-12-01

    申请号:US11082616

    申请日:2005-03-17

    摘要: Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.

    摘要翻译: 提供制造半导体器件的方法。 在半导体衬底中形成沟槽。 形成部分填充沟槽的第一场氧化物层。 第一场氧化物层限定与沟槽相邻的衬底的有源区。 沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。 第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。 在第一衬垫上形成第二场氧化物层并填充沟槽。 每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。 介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。 在电介质层上形成栅电极。

    Chemical mechanical polishing methods utilizing pH-adjusted polishing
solutions
    4.
    发明授权
    Chemical mechanical polishing methods utilizing pH-adjusted polishing solutions 失效
    使用pH调节抛光溶液的化学机械抛光方法

    公开(公告)号:US6080673A

    公开(公告)日:2000-06-27

    申请号:US10329

    申请日:1998-01-21

    摘要: Methods for manufacturing microelectronic using chemical mechanical polishing (CMP) comprises providing wafers wetted with deionized water mixtures having first pHs, and performing CMP on the wetted wafers while applying polishing slurries having second pHs thereto. In accordance with the invention, the first pHs are substantially equal to the second pHs.

    摘要翻译: 使用化学机械抛光(CMP)制造微电子的方法包括提供用具有第一pH的去离子水混合物润湿的晶片,并在润湿的晶片上执行CMP,同时施加具有第二pH的抛光浆料。 根据本发明,第一pH基本上等于第二pH。

    Methods for manufacturing semiconductor devices having chamfered metal silicide layers
    5.
    发明授权
    Methods for manufacturing semiconductor devices having chamfered metal silicide layers 有权
    具有倒角金属硅化物层的半导体器件的制造方法

    公开(公告)号:US06331478B1

    公开(公告)日:2001-12-18

    申请号:US09685456

    申请日:2000-10-09

    IPC分类号: H01L214763

    摘要: Methods for manufacturing a semiconductor device, in which a chamfered metal silicide layer is formed by a 2-stage continuous wet etching process using different etchants, thereby resulting in a sufficient insulation margin between a lower conductive layer including the metal silicide layer and the contact plug self-aligned with the lower conductive layer are disclosed. In the manufacture of a semiconductor device, a mask pattern is formed on a metal silicide layer to expose a portion of the metal silicide layer. The exposed portion of the metal silicide layer is isotropically etched in a first etchant to form a metal silicide layer with a shallow groove, and defects due to the silicon remaining on the surface of the metal silicide layer with the shallow groove are removed using a second etchant, to form a metal silicide layer with a smooth surface. Microelectronic structures produced by methods of the present invention are also disclosed.

    摘要翻译: 制造半导体器件的方法,其中通过使用不同蚀刻剂的2阶段连续湿蚀刻工艺形成倒角金属硅化物层,从而在包括金属硅化物层的下导电层和接触插塞之间形成足够的绝缘边缘 公开了与下导电层自对准。 在半导体器件的制造中,在金属硅化物层上形成掩模图案以暴露金属硅化物层的一部分。 金属硅化物层的暴露部分在第一蚀刻剂中被各向同性地蚀刻以形成具有浅槽的金属硅化物层,并且由于在具有浅槽的金属硅化物层的表面上残留的硅的缺陷被使用第二 蚀刻剂,以形成具有光滑表面的金属硅化物层。 还公开了通过本发明的方法生产的微电子结构。

    Method of filling contact hole of semiconductor device
    6.
    发明授权
    Method of filling contact hole of semiconductor device 有权
    填充半导体器件接触孔的方法

    公开(公告)号:US06638855B1

    公开(公告)日:2003-10-28

    申请号:US09502200

    申请日:2000-02-10

    IPC分类号: H01L214763

    摘要: A method of filling a contact hole of a semiconductor device preceded by dry cleaning for removing a damaged layer resulting from dry etching is provided. The method includes selectively exposing an underlying material layer by a dry etch and dry cleaning including passing plasma excited from a source gas over the exposed underlying material layer to remove the damaged layer formed from the dry etch. Subsequently, an electrically conductive layer with which to fill the contact hole is formed. The formation of the electrically conductive layer is performed in a separate chamber connected sequentially to a chamber for performing the dry cleaning to prevent the exposed underlying material layer inside the dry cleaned contact hole from being exposed to a source of contamination.

    摘要翻译: 提供了一种在干法清洗之前填充半导体器件的接触孔的方法,用于去除由干蚀刻产生的损伤层。 该方法包括通过干式蚀刻和干式清洗选择性地暴露下层材料层,包括使从源气体激发的等离子体流过暴露的下层材料层,以去除由干蚀刻形成的损伤层。 随后,形成用于填充接触孔的导电层。 导电层的形成在依次连接到用于执行干洗的室的单独的室中进行,以防止干式清洁的接触孔内的暴露的下层材料层暴露于污染源。

    Aqueous cleaning solution for removing contaminants surface of circuit substrate cleaning method using the same
    7.
    发明授权
    Aqueous cleaning solution for removing contaminants surface of circuit substrate cleaning method using the same 失效
    用于清除污染物表面的水性清洁溶液使用其清洗方法

    公开(公告)号:US06399552B1

    公开(公告)日:2002-06-04

    申请号:US09451844

    申请日:1999-12-01

    IPC分类号: C11D708

    摘要: A cleaning solution for removing contaminants from the surface of an integrated circuit substrate includes a fluoride reducing agent, an organic acid containing a carboxyl group, an alkaline pH controller and water. The pH of the cleaning solution is 3.5-8.8. The cleaning solution is used at a low temperature, such as room temperature, which is lower than that for conventional cleaning solutions. Therefore, the cleaning solution does not evaporate. Furthermore, a cleaning method using the cleaning solution does not require a pre-ashing step to reinforce the cleaning agent, nor is an alcohol rinse step required. The cleaning solution is removed by rinsing with deionized water. Therefore, the cleaning method using the cleaning solution is quicker and less costly than conventional cleaning methods.

    摘要翻译: 用于从集成电路基板的表面除去污染物的清洗液包括氟化物还原剂,含有羧基的有机酸,碱性pH控制剂和水。 清洗液的pH值为3.5-8.8。 清洁溶液在比常规清洁溶液低的低温(例如室温)下使用。 因此,清洗液不会蒸发。 此外,使用清洁溶液的清洁方法不需要预灰化步骤来加强清洁剂,也不需要醇漂洗步骤。 通过用去离子水冲洗除去清洁溶液。 因此,使用清洁溶液的清洁方法比常规清洁方法更快,成本更低。