公开(公告)号：US20160149037A1

公开(公告)日：2016-05-26

申请号：US14950833

申请日：2015-11-24

Applicant: Commissariat a l'energie atomique et aux energies alternatives ,  STMICROELECTRONICS, Inc.

Inventor： Shay REBOH ,  Pierre MORIN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/165 ,  H01L29/66 ,  H01L29/16 ,  H01L29/161

CPC classification number: H01L29/7848 ,  H01L29/0649 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636

Abstract: Method of making at least one transistor strained channel semiconducting structure, comprising steps to form a sacrificial gate block and insulating spacers arranged in contact with the lateral faces of the sacrificial gate block, form sacrificial regions in contact with the lateral faces of said semiconducting zone, said sacrificial regions being configured so as to apply a strain on said semiconducting zone, remove said sacrificial gate block between said insulating spacers, replace said sacrificial gate block by a replacement gate block between said insulating spacers, remove said sacrificial regions, and replace said sacrificial regions by replacement regions in contact with the lateral faces of said semiconducting zone, on a semiconducting zone that will form a transistor channel region.

Abstract translation: 制造至少一个晶体管应变通道半导体结构的方法，包括形成牺牲栅极块的步骤和与牺牲栅极块的侧面接触地布置的绝缘间隔物，形成与所述半导体区域的侧面接触的牺牲区域， 所述牺牲区域被配置为在所述半导体区域上施加应变，去除所述绝缘间隔物之间​​的所述牺牲栅极块，用所述绝缘间隔物之间​​的置换栅极块代替所述牺牲栅极块，去除所述牺牲区域， 区域，其与形成晶体管沟道区域的半导体区域相接触，与所述半导体区域的侧面接触。

公开(公告)号：US20160181439A1

公开(公告)日：2016-06-23

申请号：US14978778

申请日：2015-12-22

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Emmanuel AUGENDRE ,  Maxime ARGOUD ,  Sylvain MAITREJEAN ,  Pierre MORIN ,  Raluca TIRON

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L27/1222 ,  H01L27/127 ,  H01L29/1033 ,  H01L29/1037 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/78 ,  H01L29/7842 ,  H01L29/78654

Abstract: A field-effect transistor including an active zone comprises a source, a channel, a drain and a control gate, which is positioned level with the channel, allowing a current to flow through the channel between the source and drain along an x-axis, the channel comprising: a first edge of separation with the source; and a second edge of separation with the drain; the channel being compressively or tensilely strained, wherein the channel includes a localized perforation or a set of localized perforations along at least the first and/or second edge of the channel so as to also create at least one shear strain in the channel. A process for fabricating the transistor is provided.

Abstract translation: 包括有源区的场效应晶体管包括源极，沟道，漏极和控制栅极，其与沟道水平定位，允许电流沿x轴流过源极和漏极之间的沟道， 所述通道包括：与所述源分离的第一边缘; 和与排水管分离的第二边缘; 所述通道被压缩或拉伸应变，其中所述通道包括沿通道的至少第一和/或第二边缘的局部穿孔或一组局部穿孔，以便也在通道中产生至少一个剪切应变。 提供了制造晶体管的工艺。

公开(公告)号：US20210104634A1

公开(公告)日：2021-04-08

申请号：US17123231

申请日：2020-12-16

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Emmanuel AUGENDRE ,  Maxime ARGOUD ,  Sylvain MAITREJEAN ,  Pierre MORIN ,  Raluca TIRON

IPC: H01L29/786 ,  H01L29/78 ,  H01L29/10 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L27/12

Abstract: A field-effect transistor including an active zone comprises a source, a channel, a drain and a control gate, which is positioned level with the channel, allowing a current to flow through the channel between the source and drain along an x-axis, the channel comprising: a first edge of separation with the source; and a second edge of separation with the drain; the channel being compressively or tensilely strained, wherein the channel includes a localized perforation or a set of localized perforations along at least the first and/or second edge of the channel so as to also create at least one shear strain in the channel. A process for fabricating the transistor is provided.

公开(公告)号：US20170263495A1

公开(公告)日：2017-09-14

申请号：US15457447

申请日：2017-03-13

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS Inc

Inventor： Emmanuel AUGENDRE ,  Nicolas LOUBET ,  Sylvain MAITREJEAN ,  Pierre MORIN

IPC: H01L21/762 ,  H01L29/16 ,  H01L29/78

Abstract: The method of manufacturing a structure comprising one or several strained semiconducting zones capable of forming one or several transistor channel regions, the method including the following steps: a) providing a substrate coated with a masking layer wherein there are one or several first slits exposing one or several first oblong semiconducting portions made of a first semiconducting material and extending in a first direction, b) making a second semiconducting material grow with a mesh parameter different from the mesh parameter of the first semiconducting material, so as to form one or several first semiconducting blocks strained along the first direction, on said one or several first oblong semiconducting portions.