公开(公告)号：US11416660B1

公开(公告)日：2022-08-16

申请号：US17138833

申请日：2020-12-30

Applicant: Cadence Design Systems, Inc.

Inventor： Preeti Kapoor ,  Hui Xu ,  Hongzhou Liu ,  Sravasti G. Nair

IPC: G06F30/31 ,  G06F30/3308 ,  G06N3/12 ,  G06F30/392

Abstract: Disclosed is an improved approach to implement analog or mixed-signal designs. A method, system, and computer program product are provided to fully automate the analog placement step using a virtual grouping methodology which considers variable components and uses a genetic placement algorithm to find the best placement solution which fully respects the analog constraints defined by a user or auto identified by a tool.

公开(公告)号：US10515180B1

公开(公告)日：2019-12-24

申请号：US15396229

申请日：2016-12-30

Applicant: Cadence Design Systems, Inc.

Inventor： Karun Sharma ,  Henry Yu ,  John Hainsworth ,  Kuoching Lin ,  Jeff Taraldson ,  Hui Xu

IPC: G06F17/50 ,  G06F3/0484 ,  G06T3/00 ,  G06T3/60

Abstract: Disclosed is an approach to implement snapping techniques that aid the interactive, assisted, or automatic placement of layout instances or groups of layout instances for generating a legal placement layout while reducing or entirely eliminating any subsequent or separate performance of design rule checking with respect to the relevant design rules, constraints, or requirements governing the legality of the instances or groups of instances placed in the placement layout.

公开(公告)号：US12045730B1

公开(公告)日：2024-07-23

申请号：US16238274

申请日：2019-01-02

Applicant: Cadence Design Systems, Inc.

Inventor： Elias Lee Fallon ,  David Allan White ,  Regis R Colwell ,  Hongzhou Liu ,  Hui Xu ,  Wangyang Zhang ,  Shang Li ,  Hua Luo

IPC: G06N3/126 ,  G06F30/392

CPC classification number: G06N3/126 ,  G06F30/392

Abstract: The present disclosure relates to a computer-implemented method for genetic placement of analog and mix-signal circuit components. Embodiments may include receiving an unplaced layout associated with an electronic circuit design and grouping requirements. Embodiments may also include identifying one or more instances that need to be placed in the unplaced layout and areas of the unplaced layout configured to receive the instances. Embodiments may further include analyzing one or more instances that need to be placed in the unplaced layout and the areas of the unplaced layout configured to receive the instances, wherein analyzing is based upon a row-based data structure. Embodiments may also include determining a location and an orientation for each of the one or more instances based upon the genetic algorithm and generating a placed layout based upon the determined location and orientation for each of the instances.

公开(公告)号：US11790147B1

公开(公告)日：2023-10-17

申请号：US17532087

申请日：2021-11-22

Applicant: Cadence Design Systems, Inc.

Inventor： Hongzhou Liu ,  Rahaprian Premavathi Mudiarasan ,  Sandipan Ghosh ,  Hui Xu ,  Chris (Shyh-Chang) Lin ,  Joshua Baudhuin ,  Ron Pyke ,  Juno Lin ,  Allen You ,  Yu Liu ,  Jiulong Zhang ,  Thomas Richards

IPC: G06F30/3953 ,  G06F30/31 ,  G06F30/398 ,  G06F30/3947 ,  G06F30/394

CPC classification number: G06F30/3953 ,  G06F30/31 ,  G06F30/394 ,  G06F30/398 ,  G06F30/3947

Abstract: Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include receiving, using a processor, an electronic design library including a plurality of design rules. Embodiments may include generating a routing graph, based upon, at least in part, the plurality of design rules, wherein the routing graph is a virtual representation of all of the available routing space for all routing layers associated with an electronic design. Embodiments may further include dynamically updating the routing graph at a graphical user interface, based upon, at least in part, a creation of a routing segment or a via at the graphical user interface.

公开(公告)号：US10769346B1

公开(公告)日：2020-09-08

申请号：US15857561

申请日：2017-12-28

Applicant: Cadence Design Systems, Inc.

Inventor： Henry Yu ,  Hui Xu ,  Karun Sharma ,  Sandipan Ghosh

IPC: G06F30/398 ,  G06F3/0486 ,  G06F30/392

Abstract: Disclosed is an approach for implementing placement for an electronic design, where when a dragged object is moved into a desired area, existing objects in that location are automatically moved as necessary in correspondence to the movement of the dragged object. Existing objects are only moved if they are causing a spacing violation or overlap with the dragged object being moved, either directly or indirectly.