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公开(公告)号：US5287021A
公开(公告)日：1994-02-15
申请号：US880109
申请日：1992-05-06
IPC分类号： H03K19/003 , H03K17/60 , H03K17/16 , H03K19/02 , H03K19/20
CPC分类号： H03K19/00346
摘要： A plurality of transistors (22, 23, 27) are utilized to provide a low noise high-to-low transition (40) on an output (19) of a circuit (10). The transistors (22, 23, 27) are sequentially enabled to vary a rate of change of output current thereby minimizing noise created by the high-to-low transition (40). A first transistor (22) is enabled to provide a low rate of change. Subsequently, a second transistor (23) is enabled to provide a higher rate of change. Then, just prior to disabling the second transistor (23) a third transistor (27) is enabled to provide a d.c. level.
摘要翻译： 多个晶体管（22,23,27）用于在电路（10）的输出（19）上提供低噪声的高到低的转换（40）。 晶体管（22,23,27）依次使能以改变输出电流的变化率，从而最小化由高到低的转变产生的噪声（40）。 第一晶体管（22）能够提供低变化率。 随后，第二晶体管（23）能够提供更高的变化率。 然后，在禁止第二晶体管（23）之前，第三晶体管（27）能够提供直流 水平。
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公开(公告)号：US5432462A
公开(公告)日：1995-07-11
申请号：US54495
申请日：1993-04-30
IPC分类号： H03K19/0175 , H03K19/00 , H03K19/0185 , H03K19/08
CPC分类号： H03K19/0016 , H03K19/018521
摘要： The present invention includes an input buffer circuit (10) having sleep mode and bus hold capability. An input section (11) of the buffer circuit is operated from an operating voltage which is lower than a supply voltage of the buffer circuit thereby minimizing the static power dissipation. Sleep mode circuitry (15, 36, 38) is included for effectively disconnecting an input signal from the rest of the buffer circuit thereby minimizing dynamic power dissipation. Bus hold circuitry (40) is included for holding the logic state appearing at an output of the input buffer circuit when the input signal is removed thereby further reducing the static power dissipation.
摘要翻译： 本发明包括具有睡眠模式和总线保持能力的输入缓冲电路（10）。 缓冲电路的输入部分（11）从低于缓冲电路的电源电压的工作电压进行操作，从而使静态功耗最小化。 包括休眠模式电路（15,36,38），用于有效地将输入信号与缓冲电路的其余部分断开，从而使动态功耗最小化。 包括总线保持电路（40），用于当输入信号被去除时保持出现在输入缓冲器电路的输出端的逻辑状态，从而进一步降低静态功耗。
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公开(公告)号：US5276362A
公开(公告)日：1994-01-04
申请号：US879646
申请日：1992-05-06
IPC分类号： H03K19/00 , H03K19/017 , H03K19/0175 , H03K19/08 , H03K19/01
CPC分类号： H03K19/01721 , H03K19/0013 , H03K19/017518
摘要： The present invention includes a circuit having an input section that is operated from an operating voltage which is lower than a supply voltage of the circuit. The operating voltage is established so that the operating voltage minus the voltage of a high level TTL signal is less than an upper level threshold voltage of the input section. The circuit couples the output of the input section to the supply voltage thereby increasing the voltage on the output of the input section to a voltage greater than the operating voltage. In addition, the circuit enables a current source during a portion of a low-to-high transition on an output of the circuit. The current source provides high current drive during the portion of the transition. Since the current source is only enabled during the portion of the transition, static power dissipation is minimized.
摘要翻译： 本发明包括具有从低于电路的电源电压的工作电压操作的输入部分的电路。 建立工作电压，使得工作电压减去高电平TTL信号的电压小于输入部分的上限阈值电压。 电路将输入部分的输出耦合到电源电压，从而将输入部分的输出端的电压增加到大于工作电压的电压。 此外，该电路在电路的输出上的低到高转换的一部分期间使能电流源。 电流源在过渡部分提供高电流驱动。 由于电流源仅在转换部分期间启用，所以静态功耗最小化。
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公开(公告)号：US5546021A
公开(公告)日：1996-08-13
申请号：US194974
申请日：1994-02-14
IPC分类号： H03K19/0175 , G06F13/40
CPC分类号： G06F13/4072 , Y02B60/1228 , Y02B60/1235
摘要： A 3 state BiCMOS output buffer (100) with power down capability has been provided. The buffer includes an input stage (102), responsive to an input signal, an output coupled to both a pull-up driver (114), and an output pull-down driver (116) wherein the drivers provide an output signal at an output of the buffer in response to the input signal. Additionally, the buffer includes a power down sense circuit (108), coupled to a power supply node (118), for turning off an output pull-up transistor (214) when the power supply node is powered down and thus eliminating leakage paths within the buffer. The buffer also includes a noise limiting circuit (112) for slowing down a high to low transition at the output of the buffer thereby reducing the switching noise of the buffer while not affecting the overall speed of the buffer.
摘要翻译： 已经提供了具有掉电能力的3状态BiCMOS输出缓冲器（100）。 缓冲器包括响应于输入信号的输入级（102），耦合到上拉驱动器（114）和输出下拉驱动器（116）的输出，其中驱动器在输出端提供输出信号 的缓冲器响应输入信号。 此外，缓冲器包括耦合到电源节点（118）的断电检测电路（108），用于在电源节点断电时关闭输出上拉晶体管（214），从而消除输出上拉晶体管 缓冲区。 缓冲器还包括用于在缓冲器的输出端缓慢降低高转变到低转换的噪声限制电路（112），从而在不影响缓冲器的整体速度的情况下降低缓冲器的开关噪声。
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公开(公告)号：US07012378B1
公开(公告)日：2006-03-14
申请号：US10773962
申请日：2004-02-06
申请人： Michael A. Wells , David F. Mietus
发明人： Michael A. Wells , David F. Mietus
IPC分类号： G05F1/00
CPC分类号： G09G3/32 , G09G2300/0809 , G09G2310/0272
摘要： A programmable multiple current source includes a plurality of current source circuits each having current level data storage circuitry. A current level data input terminal and a control input terminal are connected to each current source circuit to supply current level data to the storage circuitry. Peak detector and storage circuitry is coupled to each of the output terminals of the current source circuits. Each associated current source circuit includes a master digital-to-analog converter coupled to the current level data storage circuitry, a driver circuit coupled to the digital-to-analog converter and to the associated current source circuit, comparator and storage circuitry having a first input coupled to the peak detector and storage circuitry and a second input coupled to the driver circuit, and current level adjustment circuitry coupled to the comparator and storage circuitry and the driver circuit.
摘要翻译： 可编程多电流源包括多个电流源电路，每个电流源电路具有电流数据存储电路。 电流电平数据输入端子和控制输入端子连接到每个电流源电路以将电流电平数据提供给存储电路。 峰值检测器和存储电路耦合到电流源电路的每个输出端子。 每个相关联的电流源电路包括耦合到当前电平数据存储电路的主数模转换器，耦合到数 - 模转换器的驱动电路和相关联的电流源电路，比较器和存储电路，其具有第一 耦合到峰值检测器和存储电路的输入和耦合到驱动器电路的第二输入以及耦合到比较器和存储电路和驱动器电路的电流电平调整电路。
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6.发明授权
公开(公告)号：US5196304A
公开(公告)日：1993-03-23
申请号：US464310
申请日：1990-01-12
CPC分类号： C07K14/811 , C12N15/8286
摘要： Disclosed is a cDNA clone isolated from a fat body cDNA library from the tobacco hornworm Manduca sexta, and the deduced amino acid sequence of the serine proteinase inhibitor encoded by the cDNA.
摘要翻译： 公开了从烟草丝虫Manduca sexta的脂肪体cDNA文库中分离的cDNA克隆，以及由cDNA编码的丝氨酸蛋白酶抑制剂的推定氨基酸序列。
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