公开(公告)号：US20160283415A1

公开(公告)日：2016-09-29

申请号：US14671811

申请日：2015-03-27

申请人： Chad McBride ,  Jeffrey Bradford ,  Steven Wheeler ,  Christopher Johnson ,  Boris Bobrov ,  Andras Tantos

发明人： Chad McBride ,  Jeffrey Bradford ,  Steven Wheeler ,  Christopher Johnson ,  Boris Bobrov ,  Andras Tantos

IPC分类号： G06F13/16 ,  G06F13/42 ,  G06F13/28 ,  G06F13/40

CPC分类号： G06F13/1642 ,  G06F13/28 ,  G06F13/4068 ,  G06F13/42

摘要： Hardware accelerated synchronization of data movement across multiple direct memory access (DMA) engines is provided using techniques in which the order of descriptor processing is guaranteed for scenarios involving a single CPU and multiple DMA engines as well as those involving multiple CPUs and multiple DMA engines.

摘要翻译： 使用这样的技术提供硬件加速跨多个直接存储器访问（DMA）引擎的同步，其中描述符处理的顺序对于涉及单个CPU和多个DMA引擎以及涉及多个CPU和多个DMA引擎的情况而言是有保证的。

公开(公告)号：US20090144572A1

公开(公告)日：2009-06-04

申请号：US11575002

申请日：2004-09-10

申请人： Anton Rozen ,  Boris Bobrov ,  Michael Priel

发明人： Anton Rozen ,  Boris Bobrov ,  Michael Priel

IPC分类号： G06F1/32

CPC分类号： G06F1/324 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： A method and an apparatus for controlling voltage level and clock signal frequency supplied to a system. The apparatus includes a hardware module, adapted to receive at least one indication of a load of the system and to determine a voltage level and a clock signal frequency to be provided to the system, and a software module, adapted to configure a voltage source and a clock signal source in response to the determination. The method includes: (i) receiving, at a hardware module, indication of a load of a system; (ii) determining, by the hardware module, a voltage level and a clock signal frequency to be provided to the system; and (iii) configuring, by a software module, a voltage source and a clock signal source in response to the determination.

摘要翻译： 一种用于控制提供给系统的电压电平和时钟信号频率的方法和装置。 该装置包括硬件模块，适于接收系统负载的至少一个指示，并确定要提供给系统的电压电平和时钟信号频率;以及软件模块，适用于配置电压源和 响应于该确定的时钟信号源。 该方法包括：（i）在硬件模块处接收系统负载的指示; （ii）由所述硬件模块确定要提供给所述系统的电压电平和时钟信号频率; 以及（iii）响应于所述确定，由软件模块配置电压源和时钟信号源。

公开(公告)号：US20090015232A1

公开(公告)日：2009-01-15

申请号：US10595908

申请日：2004-11-18

申请人： Anton Rozen ,  Michael Priel ,  Leonid Smolyansky ,  Boris Bobrov

发明人： Anton Rozen ,  Michael Priel ,  Leonid Smolyansky ,  Boris Bobrov

IPC分类号： G05B24/02

CPC分类号： G06F1/324 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： A device for regulating a voltage supply to a semiconductor device, the device comprising memory for storing a plurality of performance ranges, wherein the respective performance ranges are associated with a respective supply voltage; means for measuring the performance of the semiconductor device; and a regulator for modifying the supply voltage to the semiconductor device if the measured performance of the semiconductor device is not within a predetermined portion of the performance range associated with the voltage supplied to the semiconductor device.

摘要翻译： 一种用于调节对半导体器件的电压供应的装置，所述装置包括用于存储多个性能范围的存储器，其中各个性能范围与相应的电源电压相关联; 用于测量半导体器件的性能的装置; 以及如果半导体器件的测量性能不在与提供给半导体器件的电压相关联的性能范围的预定部分内，则修改对半导体器件的电源电压的调节器。

公开(公告)号：US07975155B2

公开(公告)日：2011-07-05

申请号：US11575002

申请日：2004-09-10

申请人： Anton Rozen ,  Boris Bobrov ,  Michael Priel

发明人： Anton Rozen ,  Boris Bobrov ,  Michael Priel

IPC分类号： G06F1/26 ,  G06F1/32

CPC分类号： G06F1/324 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： A method and an apparatus for controlling voltage level and clock signal frequency supplied to a system. The apparatus includes a hardware module, adapted to receive at least one indication of a load of the system and to determine a voltage level and a clock signal frequency to be provided to the system, and a software module, adapted to configure a voltage source and a clock signal source in response to the determination. The method includes: (i) receiving, at a hardware module, indication of a load of a system; (ii) determining, by the hardware module, a voltage level and a clock signal frequency to be provided to the system; and (iii) configuring, by a software module, a voltage source and a clock signal source in response to the determination.

摘要翻译： 一种用于控制提供给系统的电压电平和时钟信号频率的方法和装置。 该装置包括硬件模块，适于接收系统负载的至少一个指示，并确定要提供给系统的电压电平和时钟信号频率;以及软件模块，适用于配置电压源和 响应于该确定的时钟信号源。 该方法包括：（i）在硬件模块处接收系统负载的指示; （ii）由所述硬件模块确定要提供给所述系统的电压电平和时钟信号频率; 以及（iii）响应于所述确定，由软件模块配置电压源和时钟信号源。

公开(公告)号：US20090171646A1

公开(公告)日：2009-07-02

申请号：US11574495

申请日：2004-08-31

申请人： Michael Silbermintz ,  Dimitri Akselrod ,  Boris Bobrov ,  Michael Priel ,  Amihay Rabenu ,  Amir Sahar ,  Shiri Shem-Tov ,  Boris Shulman

发明人： Michael Silbermintz ,  Dimitri Akselrod ,  Boris Bobrov ,  Michael Priel ,  Amihay Rabenu ,  Amir Sahar ,  Shiri Shem-Tov ,  Boris Shulman

IPC分类号： G06G7/62

CPC分类号： G06F11/3616 ,  G06F2217/78

摘要： A method for determining system and software configuration that includes: calculating a power consumption estimate of a modeled system associated with an execution of a certain software code; and altering, in response to the power consumption estimate, the certain software code or the modeled system. A method of determining a power consumption of a system that executed a software code, the method includes the stages of: providing a reduced instruction set representation of the software code; and calculating a power consumption estimate of a modeled system associated with an execution of the reduced instruction set representation of the software code.

摘要翻译： 一种用于确定系统和软件配置的方法，包括：计算与某个软件代码的执行相关联的建模系统的功耗估计; 并且响应于功耗估计改变某些软件代码或建模的系统。 一种确定执行软件代码的系统的功耗的方法，所述方法包括以下阶段：提供所述软件代码的精简指令集表示; 以及计算与执行所述软件代码的精简指令集表示相关联的建模系统的功耗估计。