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    Refresh control circuit and method for performing a repetition refresh operation and semiconductor memory device having the same
    2.
    发明申请
    Refresh control circuit and method for performing a repetition refresh operation and semiconductor memory device having the same 失效
    用于执行重复刷新操作的刷新控制电路和方法以及具有该刷新控制电路的半导体存储器件

    公开(公告)号：US20070019491A1

    公开(公告)日：2007-01-25

    申请号：US11270650

    申请日：2005-11-10

    申请人： Young Jang ,  Jin So ,  Hyung Kim

    发明人： Young Jang ,  Jin So ,  Hyung Kim

    IPC分类号： G11C7/00

    CPC分类号： G11C11/406 ,  G11C11/408 ,  G11C11/4087

    摘要： A refresh control circuit and semiconductor devices that may include an address counter for generating a counting address, a repetition address selector for generating a repetition address, a repetition refresh controller for generating a refresh repetition signal based on the counting address and repetition address, and a row decoder for selecting a row of a memory bank based on the counting address and the refresh repetition signal. A method for performing a refresh operation on a semiconductor device that may include receiving a refresh trigger, generating a counting address, generating a repetition address corresponding to a row having a degraded memory cell, providing a refresh repetition signal based on a comparison of the counting address and repetition address, and selecting a row to be refreshed based on one or more of the counting address, repetition address, and the refresh repetition address.

    摘要翻译： 刷新控制电路和半导体器件，其可以包括用于产生计数地址的地址计数器，用于产生重复地址的重复地址选择器，用于基于计数地址和重复地址产生刷新重复信号的重复刷新控制器，以及 行解码器，用于基于计数地址和刷新重复信号来选择存储体组的行。 一种用于在半导体器件上执行刷新操作的方法，所述方法包括：接收刷新触发，产生计数地址，产生与具有劣化存储单元的行对应的重复地址，基于计数的比较提供刷新重复信号 地址和重复地址，并且基于计数地址，重复地址和刷新重复地址中的一个或多个来选择要刷新的行。

    Shift register and method for driving the same
    3.
    发明申请
    Shift register and method for driving the same 有权
    移位寄存器和驱动方法

    公开(公告)号：US20060238482A1

    公开(公告)日：2006-10-26

    申请号：US11289384

    申请日：2005-11-30

    申请人： Young Jang ,  Binn Kim

    发明人： Young Jang ,  Binn Kim

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G2320/0223 ,  G11C19/28

    摘要： A shift register and a method for driving the same are disclosed. The shift register includes a plurality of stages serially connected to each other. Each of the stages independently generates first and second scan pulses. The first scan pulse is simultaneously applied to a previous stage and to a corresponding gate line of a liquid crystal panel. The second scan pulse is applied to a next stage. The shift register prevents scan pulses applied to each stage from being distorted, and prevents a multi-output signal from being generated.

    摘要翻译： 公开了一种移位寄存器及其驱动方法。 移位寄存器包括彼此串联连接的多个级。 每个级独立产生第一和第二扫描脉冲。 第一扫描脉冲同时施加到液晶面板的前一级和对应的栅极线。 第二个扫描脉冲被施加到下一个阶段。 移位寄存器防止施加到每一级的扫描脉冲失真，并且防止产生多输出信号。

    Tuner and slim TV with the same
    6.
    发明申请
    Tuner and slim TV with the same 审中-公开
    调谐器和超薄的电视机一样

    公开(公告)号：US20060268184A1

    公开(公告)日：2006-11-30

    申请号：US11195736

    申请日：2005-08-03

    申请人： Byung Kim ,  Jong Yun ,  Kwang Choi ,  Si Kwon ,  Young Jang

    发明人： Byung Kim ,  Jong Yun ,  Kwang Choi ,  Si Kwon ,  Young Jang

    IPC分类号： H04N5/50 ,  H04N5/64

    CPC分类号： H04N5/64

    摘要： A slim TV includes a monitor panel defining a front portion of the slim TV, a printed circuit board (PCB) mounted on a rear surface of the monitor panel, a rear cover enclosing the printed circuit board, the rear cover having a main body and a flange bent from the rear cover toward the monitor panel, and a tuner mounted on the PCB board to convert an RF signal into an IF signal. The tuner includes a chassis for receiving an electric circuit board, an antenna input terminal projected out of the chassis through a front part of the chassis in a direction perpendicular to the main body of the rear cover, the front part of the chassis being in parallel with the main body of the rear cover, and terminal pins projected out of the chassis in a direction opposite to that in which the antenna input terminal is projected.

    摘要翻译： 一种超薄的电视机包括限定超薄电视的前部的监视器面板，安装在监视器面板的后表面上的印刷电路板（PCB），封闭印刷电路板的后盖，后盖具有主体和 从后盖朝向监视器面板弯曲的凸缘，以及安装在PCB板上以将RF信号转换为IF信号的调谐器。 该调谐器包括用于接收电路板的底盘，天线输入端从垂直于后盖主体的方向通过底盘的前部伸出机箱，底盘的前部平行 与后盖的主体，并且端子销以与天线输入端子投影的方向相反的方向从机箱突出出来。

    Digital duty cycle correction circuit and method for multi-phase clock
    8.
    发明申请
    Digital duty cycle correction circuit and method for multi-phase clock 失效

    公开(公告)号：US20050007168A1

    公开(公告)日：2005-01-13

    申请号：US10774398

    申请日：2004-02-10

    申请人： Hong Park ,  Young Jang ,  Seung Bae

    发明人： Hong Park ,  Young Jang ,  Seung Bae

    IPC分类号： H03K5/00 ,  H03K3/017 ,  H03K5/156

    CPC分类号： H03K5/1565

    摘要： Provided is a digital duty cycle correction circuit and method for a multi-phase clock, in which duty cycle correction information of an input clock signal is stored in a power save state of a system by adopting a digital correction method in a duty cycle correction method for a multi-phase clock and phase information of the input clock signal is held constant during duty cycle correction of the input clock signal by correcting duty cycles of the input clock signal by changing the falling edge of the clock without changing the rising edge of the input clock signal during duty cycle correction of the input clock signal, thereby correcting the multi-phase clock. To this end, the digital duty cycle correction circuit includes a clock delay means that takes the form of a shunt capacitor-inverter, a clock generation means including a clock rising edge generation circuit and a clock falling edge generation circuit, and a digital duty cycle detection means including integrators, a comparator, and a counter/register.

    Semiconductor device having adaptive power function
    9.
    发明申请
    Semiconductor device having adaptive power function 有权
    具有自适应功率功能的半导体器件

    公开(公告)号：US20070124630A1

    公开(公告)日：2007-05-31

    申请号：US11543112

    申请日：2006-10-05

    申请人： Hoe Chung ,  Young Jang

    发明人： Hoe Chung ,  Young Jang

    IPC分类号： G11C29/00

    CPC分类号： G11C5/147 ,  G11C7/1006

    摘要： In one embodiment, the semiconductor device includes at least one circuit element configured to generate output data. At least one control circuit is configured to adaptively control a power of the output data based on feedback from a receiving semiconductor device, which receives the output data.

    摘要翻译： 在一个实施例中，半导体器件包括被配置为产生输出数据的至少一个电路元件。 至少一个控制电路被配置为基于接收输出数据的接收半导体器件的反馈来自适应地控制输出数据的功率。

    Method of manufacturing semiconductor device
    10.
    发明申请
    Method of manufacturing semiconductor device 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20060223332A1

    公开(公告)日：2006-10-05

    申请号：US11299079

    申请日：2005-12-08

    申请人： Young Jang ,  Sang Kim

    发明人： Young Jang ,  Sang Kim

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/76829 ,  H01L21/02052 ,  H01L21/02063 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/31116 ,  H01L21/31612 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831

    摘要： A method of manufacturing semiconductor devices includes forming an interlayer insulation film over a semiconductor substrate, the substrate having a first gate structure for a memory cell and a second gate structure for a control transistor, the interlayer insulation film overlying the first and second gate structures; annealing the interlayer insulation film; etching the interlayer insulation film to form a contact hole to expose a conductive region associated with the second gate structure; and forming an oxide film over a surface of the interlayer insulation film and over a surface of the contact hole using ozone.

    摘要翻译： 制造半导体器件的方法包括在半导体衬底上形成层间绝缘膜，所述衬底具有用于存储单元的第一栅极结构和用于控制晶体管的第二栅极结构，所述层间绝缘膜覆盖在所述第一和第二栅极结构上; 退火层间绝缘膜; 蚀刻层间绝缘膜以形成接触孔，以暴露与第二栅极结构相关联的导电区域; 以及使用臭氧在所述层间绝缘膜的表面上并在所述接触孔的表面上形成氧化膜。