公开(公告)号：US20090269915A1

公开(公告)日：2009-10-29

申请号：US12347420

申请日：2008-12-31

申请人： Dong Ha JUNG ,  Seung Jin YEOM ,  Baek Mann KIM ,  Chang Soo PARK ,  Jeong Tae KIM ,  Nam Yeal LEE

发明人： Dong Ha JUNG ,  Seung Jin YEOM ,  Baek Mann KIM ,  Chang Soo PARK ,  Jeong Tae KIM ,  Nam Yeal LEE

IPC分类号： H01L21/4763 ,  H01L21/283

CPC分类号： H01L21/28518

摘要： A method for manufacturing a semiconductor device includes forming an insulation layer having a contact hole on a semiconductor substrate. A metal silicide layer is deposited on a surface of the contact hole and the insulation layer to have a concentration gradient that changes from a silicon-rich composition to a metal-rich composition, with the lower portion of the metal silicide layer having the silicon-rich composition and the upper portion of the metal silicide layer having the metal-rich composition. The metal silicide layer is then annealed so that the compositions of metal and silicon in the metal silicide layer become uniform.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底上形成具有接触孔的绝缘层。 金属硅化物层沉积在接触孔和绝缘层的表面上，具有从富含硅的组合物变为富含金属的组合物的浓度梯度，金属硅化物层的下部具有硅 - 富金属组合物和具有富金属组合物的金属硅化物层的上部。 然后对金属硅化物层进行退火，使得金属硅化物层中的金属和硅的组成变得均匀。

公开(公告)号：US20090093115A1

公开(公告)日：2009-04-09

申请号：US12043186

申请日：2008-03-06

申请人： Chang Soo PARK

发明人： Chang Soo PARK

IPC分类号： H01L21/768

CPC分类号： H01L21/76879 ,  H01L21/76834 ,  H01L21/76886 ,  H01L23/53219 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal line is formed to realize an improved electrical conductivity over the conventional aluminum metal lines. The metal line of a semiconductor device is made by forming an interlayer dielectric having a metal line forming region on a semiconductor substrate. A diffusion barrier on the interlayer dielectric is formed which includes a surface of the metal line forming region. A nucleus formation prevention layer is formed on upper ends of sidewalls of the metal line forming region and on a portion of the diffusion barrier which is placed on an upper surface of the interlayer dielectric. A laminated metal layer made of an aluminum layer and a copper layer is formed to fill the metal line forming region. A portion of the laminated metal layer, the nucleus formation prevention layer and the diffusion barrier is removed to expose the interlayer dielectric. The laminated metal layer is annealed into an annealed metal layer.

摘要翻译： 形成金属线以实现比常规铝金属线更好的导电性。 半导体器件的金属线通过在半导体衬底上形成具有金属线形成区域的层间电介质来制造。 形成层间电介质的扩散阻挡层，其包括金属线形成区域的表面。 在金属线形成区域的侧壁的上端和放置在层间电介质的上表面的扩散阻挡层的一部分上形成核形成防止层。 形成由铝层和铜层构成的层叠金属层，以填充金属线形成区域。 去除层压金属层的一部分，成核防止层和扩散阻挡层，露出层间电介质。 层压金属层退火成退火金属层。

公开(公告)号：US20080251836A1

公开(公告)日：2008-10-16

申请号：US11771477

申请日：2007-06-29

申请人： Chang Soo PARK

发明人： Chang Soo PARK

IPC分类号： H01L29/792 ,  H01L21/3205

CPC分类号： H01L29/792 ,  H01L29/66833

摘要： A method for fabricating a non-volatile memory device includes forming a charge tunneling layer composed of a hafnium silicate (HfSixOyNz) layer on a semiconductor substrate. A charge trapping layer composed of a hafnium oxide nitride (HfOxNy) layer is formed on the charge tunneling layer. A charge blocking layer composed of a hafnium oxide layer is formed on the charge trapping layer. A gate layer is formed on the charge blocking layer. A non-volatile memory device fabricated by the method is also disclosed.

摘要翻译： 一种用于制造非易失性存储器件的方法包括形成由硅酸铪组成的电荷隧穿层（HfSi x x O x N z N z） 层。 在电荷隧道层上形成由氧化铪氮化物（HfO x N x N y）层构成的电荷捕获层。 在电荷捕获层上形成由氧化铪层构成的电荷阻挡层。 在电荷阻挡层上形成栅极层。 还公开了通过该方法制造的非易失性存储器件。

公开(公告)号：US20110034028A1

公开(公告)日：2011-02-10

申请号：US12906434

申请日：2010-10-18

申请人： Chang Soo PARK

发明人： Chang Soo PARK

IPC分类号： H01L21/3205 ,  H01L21/31

CPC分类号： H01L21/31695 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02362 ,  H01L21/7682 ,  H01L21/76835 ,  H01L2221/1036 ,  H01L2221/1047

摘要： The present invention related to a method for manufacturing a semiconductor device. More particularly, this method describes how to manufacture a semiconductor device having a porous, low dielectric constant layer formed between metal lines, comprising an insulation layer enveloping fillers.

摘要翻译： 本发明涉及半导体器件的制造方法。 更具体地，该方法描述了如何制造具有形成在金属线之间的多孔，低介电常数层的半导体器件，其包括绝缘层包封填料。

公开(公告)号：US20080318430A1

公开(公告)日：2008-12-25

申请号：US11966282

申请日：2007-12-28

申请人： Chang Soo PARK

发明人： Chang Soo PARK

IPC分类号： H01L21/302

CPC分类号： H01L21/31695 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02362 ,  H01L21/7682 ,  H01L21/76835 ,  H01L2221/1036 ,  H01L2221/1047

摘要： The present invention related to a method for manufacturing a semiconductor device. More particularly, this method describes how to manufacture a semiconductor device having a porous, low dielectric constant layer formed between metal lines, comprising an insulation layer enveloping fillers.

摘要翻译： 本发明涉及半导体器件的制造方法。 更具体地，该方法描述了如何制造具有形成在金属线之间的多孔，低介电常数层的半导体器件，其包括绝缘层包封填料。