TRANS-IMPEDANCE AMPLIFIER (TIA) FOR ULTRASOUND DEVICES

    公开(公告)号:US20200150252A1

    公开(公告)日:2020-05-14

    申请号:US16678830

    申请日:2019-11-08

    IPC分类号: G01S7/52 H03F3/187 G01S15/89

    摘要: A variable-current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied. The variable-current trans-impedance amplifier may include multiple stages, including a first stage having N-P transistor pairs configured to receive an input signal and produce a single-ended amplified signal.

    Asynchronous logic automata
    10.
    发明授权
    Asynchronous logic automata 有权
    异步逻辑自动机

    公开(公告)号:US08035414B2

    公开(公告)日:2011-10-11

    申请号:US12422979

    申请日:2009-04-13

    IPC分类号: H03K19/173 H03K19/177

    CPC分类号: G06F7/388

    摘要: A family of reconfigurable, charge-conserving asynchronous logic elements that interact with their nearest neighbors permits design and implementation of circuits that are asynchronous at the bit level, rather than at the level of functional blocks. These elements pass information by means of charge packets (tokens), rather than voltages. Each cell is self-timed, and cells that are configured as interconnect perform at propagation delay speeds, so no hardware non-local connections are needed. An asynchronous logic element comprises a set of edges for asynchronous communication with at least one neighboring cell, each edge having an input for receiving tokens from neighboring cells and an output for transferring an output charge packet to at least one neighboring cell, and circuitry configured to perform a logic operation utilizing received charge packets as inputs and to produce an output charge packet reflecting the result of the logic operation.

    摘要翻译: 与其最近邻居交互的可重配置,电荷节省的异步逻辑元件系列允许设计和实现在位级别而不是功能块级异步的电路。 这些元件通过电荷分组(令牌)传递信息,而不是电压。 每个单元都是自定时的,配置为互连的单元以传播延迟速度执行,因此不需要硬件非本地连接。 异步逻辑元件包括用于与至少一个相邻小区异步通信的一组边缘,每个边缘具有用于从相邻小区接收令牌的输入和用于将输出电荷分组传送到至少一个相邻小区的输出,以及被配置为 利用接收的充电分组作为输入进行逻辑运算,并产生反映逻辑运算结果的输出电荷分组。