公开(公告)号：US20110066837A1

公开(公告)日：2011-03-17

申请号：US12947211

申请日：2010-11-16

申请人： Charles C. Lee ,  Abraham C. Ma ,  Frank Yu ,  Shimon Chen

发明人： Charles C. Lee ,  Abraham C. Ma ,  Frank Yu ,  Shimon Chen

IPC分类号： G06F15/177 ,  G06F12/02 ,  G06F13/28 ,  G06F9/24

CPC分类号： G06F9/4401 ,  G06F13/387 ,  G06F2213/3854

摘要： A Multi-Media Card (MMC) Single-Chip Flash Device (SCFD) contains a MMC flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. An initial boot loader is read from the first page of flash by a state machine and written to a small RAM. A central processing unit (CPU) in the microcontroller reads instructions from the small RAM, executing the initial boot loader, which reads more pages from flash. These pages are buffered by the small RAM and written to a larger DRAM. Once an extended boot sequence is written to DRAM, the CPU toggles a RAM_BASE bit to cause instruction fetching from DRAM. Then the extended boot sequence is executed from DRAM, copying an OS image from flash to DRAM. Boot code and control code are selectively overwritten during a code updating operation to eliminate stocking issues.

摘要翻译： 多媒体卡（MMC）单片闪存器件（SCFD）包含一个MMC闪存单片机和闪存大容量存储块，其中包含可寻址的闪存阵列，而不是随机寻址。 初始引导加载程序由状态机从闪存的第一页读取并写入小RAM。 微控制器中的中央处理单元（CPU）从小型RAM读取指令，执行初始启动加载程序，从Flash读取更多的页面。 这些页面被小RAM缓冲并写入较大的DRAM。 一旦将扩展引导顺序写入DRAM，CPU将切换一个RAM_BASE位，以使DRAM从DRAM获取指令。 然后从DRAM执行扩展启动顺序，将OS映像从闪存复制到DRAM。 引导代码和控制代码在代码更新操作期间被有选择地覆盖以消除存货问题。

公开(公告)号：US20100275037A1

公开(公告)日：2010-10-28

申请号：US12831160

申请日：2010-07-06

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Jim Chin-Nan Ni ,  Shimon Chen

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Jim Chin-Nan Ni ,  Shimon Chen

IPC分类号： G06F13/36 ,  G06F13/10 ,  G06F1/04 ,  G06F13/28 ,  H04L9/00 ,  G06F1/32

CPC分类号： G06F13/385 ,  G11C16/102 ,  G11C2216/30 ,  Y02D10/14 ,  Y02D10/151

摘要： A Low-power flash-memory device uses a modified Universal-Serial-Bus (USB) 3.0 Protocol to reduce power consumption. The bit clock is slowed to reduce power and the need for pre-emphasis when USB cable lengths are short in applications. Data efficiency is improved by eliminating the 8/10-bit encoder and instead encoding sync and framing bytes as 9-bit symbols. Data bytes are expanded by bit stuffing only when a series of six ones occurs in the data. Header and payload data is transmitted as nearly 8-bits per data byte while framing is 9-bits per symbol, much less than the standard 10 bits per byte. Low-power link layers, physical layers, and scaled-down protocol layers are used. A card reader converter hub allows USB hosts to access low-power USB devices. Only one flash device is accessed, reducing power compared with standard USB broadcasting to multiple devices.

摘要翻译： 低功耗闪存设备使用修改后的通用串行总线（USB）3.0协议来降低功耗。 当应用程序中的USB电缆长度短时，位时钟减慢了功率，并且需要预加重。 通过消除8/10位编码器并将同步和成帧字节编码为9位符号来提高数据效率。 数据字节只有在数据中出现一系列6个数据字节时才能通过位填充进行扩展。 标头和有效载荷数据以每个数据字节近8位的形式传输，而成帧是每个符号9位，远远小于每个字节的标准10位。 使用低功率链路层，物理层和缩小协议层。 读卡器转换器集线器允许USB主机访问低功耗USB设备。 只有一个闪存设备被访问，与标准的USB广播相比，将功耗降低到多个设备。

公开(公告)号：US08296467B2

公开(公告)日：2012-10-23

申请号：US12947211

申请日：2010-11-16

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Shimon Chen

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Shimon Chen

IPC分类号： G06F3/00 ,  G06F12/00

CPC分类号： G06F9/4401 ,  G06F13/387 ,  G06F2213/3854

摘要： A Multi-Media Card (MMC) Single-Chip Flash Device (SCFD) contains a MMC flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. An initial boot loader is read from the first page of flash by a state machine and written to a small RAM. A central processing unit (CPU) in the microcontroller reads instructions from the small RAM, executing the initial boot loader, which reads more pages from flash. These pages are buffered by the small RAM and written to a larger DRAM. Once an extended boot sequence is written to DRAM, the CPU toggles a RAM_BASE bit to cause instruction fetching from DRAM. Then the extended boot sequence is executed from DRAM, copying an OS image from flash to DRAM. Boot code and control code are selectively overwritten during a code updating operation to eliminate stocking issues.

摘要翻译： 多媒体卡（MMC）单片闪存器件（SCFD）包含一个MMC闪存单片机和闪存大容量存储块，其中包含可寻址的闪存阵列，而不是随机寻址。 初始引导加载程序由状态机从闪存的第一页读取并写入小RAM。 微控制器中的中央处理单元（CPU）从小型RAM读取指令，执行初始启动加载程序，从Flash读取更多的页面。 这些页面被小RAM缓冲并写入较大的DRAM。 一旦将扩展引导顺序写入DRAM，CPU将切换一个RAM_BASE位，以使DRAM从DRAM获取指令。 然后从DRAM执行扩展启动顺序，将OS映像从闪存复制到DRAM。 引导代码和控制代码在代码更新操作期间被有选择地覆盖以消除存货问题。

公开(公告)号：US08166221B2

公开(公告)日：2012-04-24

申请号：US12831160

申请日：2010-07-06

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Jim Chin-Nan Ni ,  Shimon Chen

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma ,  Jim Chin-Nan Ni ,  Shimon Chen

IPC分类号： G06F13/12 ,  G06F13/00

CPC分类号： G06F13/385 ,  G11C16/102 ,  G11C2216/30 ,  Y02D10/14 ,  Y02D10/151

摘要： A Low-power flash-memory device uses a modified Universal-Serial-Bus (USB) 3.0 Protocol to reduce power consumption. The bit clock is slowed to reduce power and the need for pre-emphasis when USB cable lengths are short in applications. Data efficiency is improved by eliminating the 8/10-bit encoder and instead encoding sync and framing bytes as 9-bit symbols. Data bytes are expanded by bit stuffing only when a series of six ones occurs in the data. Header and payload data is transmitted as nearly 8-bits per data byte while framing is 9-bits per symbol, much less than the standard 10 bits per byte. Low-power link layers, physical layers, and scaled-down protocol layers are used. A card reader converter hub allows USB hosts to access low-power USB devices. Only one flash device is accessed, reducing power compared with standard USB broadcasting to multiple devices.

摘要翻译： 低功耗闪存设备使用修改后的通用串行总线（USB）3.0协议来降低功耗。 当应用程序中的USB电缆长度短时，位时钟减慢了功率，并且需要预加重。 通过消除8/10位编码器并将同步和成帧字节编码为9位符号来提高数据效率。 数据字节只有在数据中出现一系列6个数据字节时才能通过位填充进行扩展。 标头和有效载荷数据以每个数据字节近8位的形式传输，而成帧是每个符号9位，远远小于每个字节的标准10位。 使用低功率链路层，物理层和缩小协议层。 读卡器转换器集线器允许USB主机访问低功耗USB设备。 只有一个闪存设备被访问，与标准的USB广播相比，将功耗降低到多个设备。

公开(公告)号：US20110145489A1

公开(公告)日：2011-06-16

申请号：US13032564

申请日：2011-02-22

申请人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

发明人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

IPC分类号： G06F12/00

CPC分类号： G06F3/0656 ,  G06F3/0613 ,  G06F3/068 ,  G06F3/0685 ,  G06F3/0688

摘要： A hybrid storage device comprises both solid-state disk (SDD) and at least one hard disk drive (HDD). The hybrid storage device has at least two operational modes: concatenation and safe. According to one aspect, the total capacity of hybrid storage device is the sum of SSD and at least one HDD in a concatenation or big mode, while the total capacity is the capacity of the HDD in a safe mode.

摘要翻译： 混合存储设备包括固态盘（SDD）和至少一个硬盘驱动器（HDD）。 混合存储设备具有至少两种操作模式：级联和安全。 根据一个方面，混合存储设备的总容量是SSD和连接或大模式中的至少一个HDD的总和，而总容量是HDD在安全模式下的容量。

公开(公告)号：US20110179219A1

公开(公告)日：2011-07-21

申请号：US13076369

申请日：2011-03-30

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Shimon Chen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Shimon Chen

IPC分类号： G06F12/00

CPC分类号： G06F3/0664 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0688 ,  G06F11/1456 ,  G06F12/0246 ,  G06F2212/225 ,  G06F2212/7201 ,  G06F2212/7208 ,  G06F2212/7211

摘要： A hybrid storage device comprises both solid-state disk (SDD) and at least one hard disk drive (HDD). The hybrid storage device has at least two operational modes: concatenation and safe. According to one aspect, the total capacity of hybrid storage device is the sum of SSD and at least one HDD in a concatenation or big mode, while the total capacity is the capacity of the HDD in a safe mode. In one embodiment, HDD is configured for storing a copy of the SSD's contents in a reserved area. In another, SSD comprises more than one identical flash memory devices controlled by a RAID controller.

摘要翻译： 混合存储设备包括固态盘（SDD）和至少一个硬盘驱动器（HDD）。 混合存储设备具有至少两种操作模式：级联和安全。 根据一个方面，混合存储设备的总容量是SSD和连接或大模式中的至少一个HDD的总和，而总容量是HDD在安全模式下的容量。 在一个实施例中，HDD被配置为将SSD的内容的副本存储在保留区域中。 另一方面，SSD包括由RAID控制器控制的多于一个的相同闪存设备。

公开(公告)号：US08060670B2

公开(公告)日：2011-11-15

申请号：US12717918

申请日：2010-03-04

申请人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

发明人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

IPC分类号： G06F12/02 ,  G06F13/36 ,  G06F3/00

CPC分类号： G06F13/1684 ,  G11C16/102 ,  G11C2216/30

摘要： Methods and systems for storing and accessing data in UAS based flash memory device are disclosed. UAS based flash memory device comprises a controller and a plurality of non-volatile memories (e.g., flash memory) it controls. Controller is configured for connecting to a UAS host via a physical layer (e.g., plug and wire based on USB 3.0) and for conducting data transfer operations via two sets of logical pipes. Controller further comprises a random-access-memory (RAM) buffer configured for enabling parallel and duplex data transfer operations through the sets of logical pipes. In addition, a Smart Storage Switch configured for connecting multiple non-volatile memory devices is included in the controller. Finally, a security module/engine/unit is provided for data security via user authentication data encryption/decryption of the device. Furthermore, the flash memory device includes an optical transceiver configured for optical connection to a host also configured with an optical transceiver.

摘要翻译： 公开了在基于UAS的闪存设备中存储和访问数据的方法和系统。 基于UAS的闪存设备包括控制器和它控制的多个非易失性存储器（例如闪存）。 控制器被配置为经由物理层（例如，基于USB 3.0的插头和线路）连接到UAS主机，并且用于经由两组逻辑管道进行数据传输操作。 控制器还包括随机存取存储器（RAM）缓冲器，其配置用于通过逻辑管道集合实现并行和双工数据传输操作。 此外，控制器中还包括配置用于连接多个非易失性存储设备的智能存储交换机。 最后，通过设备的用户认证数据加密/解密来提供用于数据安全的安全模块/引擎/单元。 此外，闪速存储器件包括被配置用于光学连接到也配置有光收发器的主机的光收发器。

公开(公告)号：US20100185808A1

公开(公告)日：2010-07-22

申请号：US12717918

申请日：2010-03-04

申请人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

发明人： I-Kang Yu ,  Charles C. Lee ,  Shimon Chen ,  Abraham C. Ma

IPC分类号： G06F12/02 ,  G06F13/36 ,  G06F12/14 ,  G06F13/00

CPC分类号： G06F13/1684 ,  G11C16/102 ,  G11C2216/30

摘要： Methods and systems for storing and accessing data in UAS based flash memory device are disclosed. UAS based flash memory device comprises a controller and a plurality of non-volatile memories (e.g., flash memory) it controls. Controller is configured for connecting to a UAS host via a physical layer (e.g., plug and wire based on USB 3.0) and for conducting data transfer operations via two sets of logical pipes. Controller further comprises a random-access-memory (RAM) buffer configured for enabling parallel and duplex data transfer operations through the sets of logical pipes. In addition, a Smart Storage Switch configured for connecting multiple non-volatile memory devices is included in the controller. Finally, a security module/engine/unit is provided for data security via user authentication data encryption/decryption of the device. Furthermore, the flash memory device includes an optical transceiver configured for optical connection to a host also configured with an optical transceiver.

摘要翻译： 公开了在基于UAS的闪存设备中存储和访问数据的方法和系统。 基于UAS的闪存设备包括控制器和它控制的多个非易失性存储器（例如闪存）。 控制器被配置为经由物理层（例如，基于USB 3.0的插头和线路）连接到UAS主机，并且用于经由两组逻辑管道进行数据传输操作。 控制器还包括随机存取存储器（RAM）缓冲器，其配置用于通过逻辑管道集合实现并行和双工数据传输操作。 此外，控制器中还包括配置用于连接多个非易失性存储设备的智能存储交换机。 最后，通过设备的用户认证数据加密/解密来提供用于数据安全的安全模块/引擎/单元。 此外，闪速存储器件包括被配置用于光学连接到也配置有光收发器的主机的光收发器。

公开(公告)号：US08200862B2

公开(公告)日：2012-06-12

申请号：US12887477

申请日：2010-09-21

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F13/12 ,  G06F13/00 ,  G06F12/02

CPC分类号： G06F13/28 ,  G11C13/0004 ,  G11C16/102 ,  G11C2216/30 ,  Y02D10/14

摘要： A flash-card reader improves transmission efficiency by using bulk streaming of multiple pipes. A bulk data-out pipe carries host write data to the card reader and can operate in parallel with a bulk data-in pipe that carries host read data that was read from a flash card attached to the card reader. Status packets do not block data packets since the he status packets are buffered through a separate status pipe, and commands are buffered through a command pipe. Flash data from multiple flash cards are interleaved as separate endpoints that share the bulk data-in pipe. A data in/out streaming state machine controls streaming bulk data through the bulk data-in and data-out pipes, while a status streaming state machine controls streaming status packets through the status pipe. Transaction overhead is reduced using bulk streaming where packets for several commands are combined into the same bulk streams.

摘要翻译： 闪存卡读卡器通过使用多个管道的批量流传输来提高传输效率。 批量数据输出管道将主机写入数据传送到读卡器，并且可以与承载从附接到读卡器的闪存卡读取的主机读取数据的批量数据输入管并行操作。 状态数据包不会阻塞数据包，因为状态数据包通过单独的状态管道进行缓冲，命令通过命令管道缓冲。 来自多个闪存卡的闪存数据被交织为共享大容量数据管道的单独端点。 数据输入/输出流状态机通过批量数据输入和数据输出管道控制流批量数据，而状态流状态机通过状态管道控制流状态数据包。 使用批量流量减少事务开销，其中几个命令的数据包被组合成相同的批量流。

公开(公告)号：US08108590B2

公开(公告)日：2012-01-31

申请号：US12139842

申请日：2008-06-16

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K19/07 ,  G06K19/07354

摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

摘要翻译： 闪存系统具有可以并行访问的多个闪存芯片的通道。 主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。 当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。 因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。 发生STOP命令时，页面缓冲区被复制到AFB。 每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。