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公开(公告)号：US4283881A
公开(公告)日：1981-08-18
申请号：US156724
申请日：1980-06-05
CPC分类号： E06B9/01
摘要： A security guard for mounting to a frame of a window opening in a building includes an elongated channel bar having a plurality of mounting pins secured to one end thereof and a key actuated lock visible and operable only from the interior of the building mounted within the confined flanged area of the bar at the opposite end thereof, the mounting pins and the retractable dead bolt of the lock cooperative with adjacent window frame structure to securely but releasably retain the channel bar in position next to the window on the interior side thereof. The spaced pins prohibit the bar from being rotated and an additional lock cover member mounted to the bar substantially coextensive of the lock protects the lock from external tampering. Suitable grill work or the like may be mounted to and supported by the channel bar.
摘要翻译： 用于安装到建筑物中的窗户开口的框架的安全保护装置包括细长的通道杆，其具有固定到其一端的多个安装销和可操作的钥匙致动的锁，并且仅可从安装在受限制的 杆的相对端的凸缘区域，锁的可缩回的止动螺栓与相邻的窗框结构协作，以牢固地但可释放地将通道杆保持在其内侧上的窗口旁边的适当位置。 间隔开的销禁止杆旋转，并且安装到杆的附加锁盖构件基本上同延伸的锁保护锁不受外部篡改。 合适的格栅工作等可以安装到通道条并由通道条支撑。
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公开(公告)号：US20090160981A1
公开(公告)日：2009-06-25
申请号：US11961208
申请日：2007-12-20
IPC分类号： H04N5/335 , H01L27/146
CPC分类号： H01L27/14603 , H01L27/14647 , H04N9/045
摘要： A color photo sensing structure, includes an array of multiple color photo sensing elements. The photo sensing structure includes a first pixel located laterally with respect to a second pixel in a substrate of a first conductivity. The first pixel includes a first doped region of a second conductivity formed in the substrate and a second doped region of a first conductivity formed in the substrate above the first doped region. The second pixel includes two doped regions formed in the substrate having a first conductivity and a second conductivity, respectively. The color photo sensing structure further includes a controller for sequentially providing a first photocurrent value of the first doped region, a second photocurrent value of both the first and second doped regions and a third photocurrent value of the two doped regions of the second pixel.
摘要翻译： 彩色感光结构包括多个彩色感光元件阵列。 光感测结构包括相对于第一导电性的衬底中的第二像素横向定位的第一像素。 第一像素包括在衬底中形成的第二导电体的第一掺杂区域和形成在第一掺杂区域上方的衬底中的第一导电体的第二掺杂区域。 第二像素包括分别形成在衬底中的具有第一导电性和第二导电性的两个掺杂区域。 彩色感光结构还包括控制器，用于顺序地提供第一掺杂区的第一光电流值，第一和第二掺杂区的第二光电流值和第二像素的两个掺杂区的第三光电流值。
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公开(公告)号：US5382956A
公开(公告)日：1995-01-17
申请号：US876645
申请日：1992-04-30
CPC分类号： H03F3/45968 , G06F19/3406 , H03F3/45188 , H03F3/45659 , H03F3/45775 , A61B5/7203 , G06F19/3412 , H03F2200/331
摘要： A mixed analog and digital integrated circuit with features which are especially useful for application as a front end for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs. The integrated circuit has 5 signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has 2 digital serial input lines and 2 digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to 6 compatible devices can be serially connected in a chain.
摘要翻译： 一种混合的模拟和数字集成电路，具有特别适用于生理信号仪器的前端（如心电图仪，肌电图仪和脑电图仪）的特点。 该集成电路具有5个信号通道，每个信号通道具有模拟放大和模数转换。 通道可以配置为输入信号放大，输入信号求和，模拟输出驱动和交流阻抗测量的各种组合。 该集成电路具有2条数字串行输入线和2条数字串行输出线，全部设计用于直接连接光耦合器。 通道配置，增益和其他参数可通过串行数字输入信号进行外部控制。 多达6个兼容的设备可以串连在一起。
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公开(公告)号：US4457709A
公开(公告)日：1984-07-03
申请号：US473595
申请日：1983-03-09
申请人： Charles E. Moore
发明人： Charles E. Moore
CPC分类号： A61C9/002 , Y10T24/44812 , Y10T24/44957
摘要： The holding device of the present invention comprises an elongated wire rod of unitary construction having a lower straight section with a pointed end adapted for insertion into an impression material of a dental mold, an intermediate section having a wire coil adapted to grip a dowel pin and an upper section extending from the intermediate section and being angularly displaced therefrom such that upon compressing and releasing the upper section relative to the intermediate section the turns of the wire coil are spread open for inserting and releasably locking a dowel pin therein with the dowel pin being automatically aligned relative to said lower section.
摘要翻译： 本发明的保持装置包括具有整体结构的细长线材，其具有下直线部分，其具有适于插入到牙科模具的印模材料中的尖端，具有适于夹紧定位销的线圈线圈的中间部分， 从中间部分延伸并且与其成角度地移位的上部部分，使得当相对于中间部分压缩和释放上部部分时，线圈的匝被敞开以将销钉销插入并可释放地锁定销销， 相对于所述下部部分自动对准。
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公开(公告)号：US07277518B2
公开(公告)日：2007-10-02
申请号：US10717778
申请日：2003-11-20
申请人： Alvin Leng Sun Loke , James Oliver Barnes , Robert Keith Barnes , Michael M. Oshima , Ronald Ray Kennedy , Charles E. Moore
发明人： Alvin Leng Sun Loke , James Oliver Barnes , Robert Keith Barnes , Michael M. Oshima , Ronald Ray Kennedy , Charles E. Moore
IPC分类号： H03D3/24
CPC分类号： H03L7/0893 , H03L7/099 , H03L7/18 , H03L2207/06
摘要： A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second set of capacitor cells configured to adjust a capacitance based on a second control voltage. The charge-pump loop filter receives a first and a second update signal, each having at least one state based on a phase difference between a first clock and a second clock, and comprises a first component and a second component. The first component is configured to adjust, during an update period, a voltage across an impedance from a reference level based on the states of the first and second update signals and to return the voltage across the impedance to the reference level prior to an end of the update period, wherein the voltage across the impedance comprises the first control voltage. The second component is configured to adjust a voltage across a capacitor based on the states of the first and second input signals, wherein the voltage across the capacitor comprises the second control voltage.
摘要翻译： 锁相环包括压控振荡器和电荷泵环路滤波器。 压控振荡器包括变容二极管，其具有被配置为基于第一控制电压来调整电容的第一组电容器单元和被配置为基于第二控制电压来调整电容的第二组电容器单元。 电荷泵环路滤波器接收第一和第二更新信号，每个信号具有基于第一时钟和第二时钟之间的相位差的至少一个状态，并且包括第一分量和第二分量。 第一组件被配置为在更新周期期间基于第一和第二更新信号的状态来调整来自参考电平的阻抗上的电压，并且在结束前将阻抗上的电压返回到参考电平 所述更新周期，其中所述阻抗两端的电压包括所述第一控制电压。 第二部件被配置为基于第一和第二输入信号的状态来调整电容器两端的电压，其中电容器两端的电压包括第二控制电压。
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公开(公告)号：US07222278B2
公开(公告)日：2007-05-22
申请号：US10666770
申请日：2003-09-17
CPC分类号： G01R31/2815 , G01R31/31855 , G01R31/318572
摘要： Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.
摘要翻译： 公开了一种用于在板互连测试期间捕获信号的边界扫描测试接收器。 测试接收机具有比较器，其具有第一输入以在电路板互连测试期间接收信号，以及第二输入以接收参考电压。 可编程迟滞电路耦合到至少一个比较器的输入端。 可编程迟滞电路可以被配置为对滞后电压和/或滞后延迟进行编程，这两者都有助于防止比较器积分信号噪声。
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7.发明授权Method for synchronizing multiple serial data streams using a plurality of clock signals 有权使用多个时钟信号同步多个串行数据流的方法公开(公告)号：US06836852B2
公开(公告)日：2004-12-28
申请号：US10021133
申请日：2001-10-29
IPC分类号： G06F104
摘要： Methods and systems for generating and synchronizing multiple clocks are disclosed herein that have extremely low skew across multiple channels and latency that is both minimal and well-defined. A phase-locked loop circuit generates a plurality of clock signals to synchronize channel circuits that receive core data streams. The channel circuits convert the core data streams into serial data streams. The phase-locked loop circuit or another phase-locked loop circuit generates a core clock signal for the registered transfer of the core data streams to the channel circuits. One or more of the plurality of clock signals may be distributed to the channel circuits by a register-to-register transfer.
摘要翻译： 本文公开了用于生成和同步多个时钟的方法和系统，其在多个信道上具有极低的偏移，并且最小和明确定义的等待时间。 锁相环电路产生多个时钟信号以同步接收核心数据流的信道电路。 通道电路将核心数据流转换为串行数据流。 锁相环电路或另一个锁相环电路产生核心时钟信号，用于核心数据流的注册传输到信道电路。 多个时钟信号中的一个或多个可以通过寄存器到寄存器传送分配给信道电路。
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8.发明授权Method and apparatus for processing image data acquired by an optical scanning device 失效用于处理由光学扫描装置获取的图像数据的方法和装置公开(公告)号：US06373995B1
公开(公告)日：2002-04-16
申请号：US09187457
申请日：1998-11-05
申请人： Charles E. Moore
发明人： Charles E. Moore
IPC分类号： G06K918
CPC分类号： H04N1/193 , G06K9/20 , H04N1/1903 , H04N1/1934 , H04N1/3876
摘要： A method and apparatus for scanning an original image with an optical scanning device and for constructing a duplication of the original image. The apparatus of the present invention comprises an optical scanning device for scanning the original image and for generating an electrical representation of the original image. The scanning device comprises an illumination device for projecting light onto an original image being scanned, an optical image sensing device disposed to receive light reflected from the original image, and a processing device in communication with the optical image sensing device for receiving electrical signals produced by the optical sensors of the optical image sensing device and for processing the electrical signals. The optical image sensing device comprises a plurality of optical sensors. Each optical sensor has a field of view and at least two of the optical sensors have fields of view which at least partially overlap. Each optical sensor generates electrical signals relating to the portion of the original image within the field of view of the respective optical sensor. The processing device processes the image data obtained by the optical sensors and determines the amount of overlap of the images obtained by adjacent optical sensors. Once the amount of overlap has been determined, the processing device uses the determined amount of overlap to construct a duplicate of the original image. Preferably, sub-arrays of data suspected of overlapping are correlated to obtain values of a correlation array. The values of the correlation array are then analyzed to determine which data in the sub-arrays is overlapping image data. The overlap is then eliminated to construct a duplication of the original image.
摘要翻译： 一种用于使用光学扫描装置扫描原始图像并构造原始图像的复制的方法和装置。 本发明的装置包括用于扫描原始图像并产生原始图像的电气表示的光学扫描装置。 扫描装置包括用于将光投射到正被扫描的原始图像的照明装置，设置成接收从原始图像反射的光的光学图像感测装置，以及与光学图像感测装置通信的处理装置，用于接收由 光学图像感测装置的光学传感器并用于处理电信号。 光学图像感测装置包括多个光学传感器。 每个光学传感器具有视场，并且至少两个光学传感器具有至少部分重叠的视场。 每个光学传感器产生与相应光学传感器的视野内的原始图像的部分有关的电信号。 处理装置处理由光学传感器获得的图像数据，并确定由相邻光学传感器获得的图像的重叠量。 一旦已经确定重叠量，处理装置使用确定的重叠量来构造原始图像的副本。 优选地，疑似重叠的数据的子阵列相关，以获得相关阵列的值。 然后分析相关阵列的值以确定子阵列中的哪些数据是重叠的图像数据。 然后消除重叠以构造原始图像的重复。
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公开(公告)号：US4203563A
公开(公告)日：1980-05-20
申请号：US947412
申请日：1978-10-02
CPC分类号： B65H18/20 , B65H19/30 , B65H2301/4172 , B65H2405/422
摘要： A doffing mechanism is illustrated wherein a cloth roll engagable means is normally carried in aligned laterally spaced relation to the cloth roll with driving means which are actuated by manually raising the cloth roll engaging means to be driven by the take-up mechanism in a reverse direction to forcefully move the cloth roll engaging means for doffing the full cloth roll into a cart positioned beside the take-up rolls for receiving and carrying away the cloth roll.
摘要翻译： 示出了一种落纱机构，其中布卷可接合装置通常以与布卷对准的横向间隔的关系方式携带，其中驱动装置通过手动提升布辊接合装置来驱动，以通过卷取机构沿相反方向驱动 强力地移动布辊接合装置，以使全卷布脱落到位于卷绕辊旁边的推车中，用于接收和携带布卷。
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10.发明授权Analog implementation of a partial response maximum likelihood (PRML) read channel 失效部分响应最大似然（PRML）读通道的模拟实现
公开(公告)号：US5734680A
公开(公告)日：1998-03-31
申请号：US513188
申请日：1995-08-09
申请人： Charles E. Moore , Richard A. Baumgartner , Travis N. Blalock , Thomas M. Walley , Robert A. Zimmer , Rajeev Badyal , Li Ching Tsai , Larry S. Metz , Sui-Hing Leung , James S. Ignowski , Kenneth R. Stafford , Ran-Fun Chiu , Richard A. Baugh
发明人： Charles E. Moore , Richard A. Baumgartner , Travis N. Blalock , Thomas M. Walley , Robert A. Zimmer , Rajeev Badyal , Li Ching Tsai , Larry S. Metz , Sui-Hing Leung , James S. Ignowski , Kenneth R. Stafford , Ran-Fun Chiu , Richard A. Baugh
CPC分类号： G11B5/09 , G11B20/10009
摘要： An analog, fully integrated, partial response maximum likelihood (PRML) read channel utilizing a high-performance analog delay line, an analog adaptive equalizer and an analog Viterbi detector is provided, resulting in saved space, performance gains, and lower power consumption. For signal detection and reconstruction used in read operations, the partial response maximum likelihood (PRML) read channel includes a variable gain amplifier coupled to a lowpass filter for input to an adaptive analog equalizer. The adaptive analog equalizer comprises an analog delay line and an analog feedforward equalizer (FFE). An analog Viterbi detector employs maximum-likelihood sequence estimation (MLSE) techniques to performs the signal detection function. A decoder/descrambler produces a final reconstructed signal. The analog implementation of a partial response maximum likelihood (PRML) read channel also includes a scrambler/encoder coupled to a write precompensation circuit for output to a separate write head.
摘要翻译： 提供了利用高性能模拟延迟线的模拟，完全集成的部分响应最大似然（PRML）读取通道，模拟自适应均衡器和模拟维特比检测器，从而节省空间，提高性能并降低功耗。 对于在读操作中使用的信号检测和重建，部分响应最大似然（PRML）读通道包括耦合到低通滤波器的可变增益放大器，用于输入到自适应模拟均衡器。 自适应模拟均衡器包括模拟延迟线和模拟前馈均衡器（FFE）。 模拟维特比检测器采用最大似然序列估计（MLSE）技术来执行信号检测功能。 解码器/解扰器产生最终的重构信号。 部分响应最大似然（PRML）读通道的模拟实现还包括耦合到写预补偿电路的加扰器/编码器，以输出到单独的写头。
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