摘要:
A doffing mechanism is illustrated wherein a cloth roll engagable means is normally carried in aligned laterally spaced relation to the cloth roll with driving means which are actuated by manually raising the cloth roll engaging means to be driven by the take-up mechanism in a reverse direction to forcefully move the cloth roll engaging means for doffing the full cloth roll into a cart positioned beside the take-up rolls for receiving and carrying away the cloth roll.
摘要:
A color photo sensing structure, includes an array of multiple color photo sensing elements. The photo sensing structure includes a first pixel located laterally with respect to a second pixel in a substrate of a first conductivity. The first pixel includes a first doped region of a second conductivity formed in the substrate and a second doped region of a first conductivity formed in the substrate above the first doped region. The second pixel includes two doped regions formed in the substrate having a first conductivity and a second conductivity, respectively. The color photo sensing structure further includes a controller for sequentially providing a first photocurrent value of the first doped region, a second photocurrent value of both the first and second doped regions and a third photocurrent value of the two doped regions of the second pixel.
摘要:
A mixed analog and digital integrated circuit with features which are especially useful for application as a front end for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs. The integrated circuit has 5 signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has 2 digital serial input lines and 2 digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to 6 compatible devices can be serially connected in a chain.
摘要:
The holding device of the present invention comprises an elongated wire rod of unitary construction having a lower straight section with a pointed end adapted for insertion into an impression material of a dental mold, an intermediate section having a wire coil adapted to grip a dowel pin and an upper section extending from the intermediate section and being angularly displaced therefrom such that upon compressing and releasing the upper section relative to the intermediate section the turns of the wire coil are spread open for inserting and releasably locking a dowel pin therein with the dowel pin being automatically aligned relative to said lower section.
摘要:
A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second set of capacitor cells configured to adjust a capacitance based on a second control voltage. The charge-pump loop filter receives a first and a second update signal, each having at least one state based on a phase difference between a first clock and a second clock, and comprises a first component and a second component. The first component is configured to adjust, during an update period, a voltage across an impedance from a reference level based on the states of the first and second update signals and to return the voltage across the impedance to the reference level prior to an end of the update period, wherein the voltage across the impedance comprises the first control voltage. The second component is configured to adjust a voltage across a capacitor based on the states of the first and second input signals, wherein the voltage across the capacitor comprises the second control voltage.
摘要:
Disclosed is a Boundary-Scan test receiver for capturing signals during board interconnect testing. The test receiver has a comparator with a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage. A programmable hysteresis circuit is coupled to at least one of the comparator's inputs. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay, both of which help prevent the comparator from integrating signal noise.
摘要:
Methods and systems for generating and synchronizing multiple clocks are disclosed herein that have extremely low skew across multiple channels and latency that is both minimal and well-defined. A phase-locked loop circuit generates a plurality of clock signals to synchronize channel circuits that receive core data streams. The channel circuits convert the core data streams into serial data streams. The phase-locked loop circuit or another phase-locked loop circuit generates a core clock signal for the registered transfer of the core data streams to the channel circuits. One or more of the plurality of clock signals may be distributed to the channel circuits by a register-to-register transfer.
摘要:
A method and apparatus for scanning an original image with an optical scanning device and for constructing a duplication of the original image. The apparatus of the present invention comprises an optical scanning device for scanning the original image and for generating an electrical representation of the original image. The scanning device comprises an illumination device for projecting light onto an original image being scanned, an optical image sensing device disposed to receive light reflected from the original image, and a processing device in communication with the optical image sensing device for receiving electrical signals produced by the optical sensors of the optical image sensing device and for processing the electrical signals. The optical image sensing device comprises a plurality of optical sensors. Each optical sensor has a field of view and at least two of the optical sensors have fields of view which at least partially overlap. Each optical sensor generates electrical signals relating to the portion of the original image within the field of view of the respective optical sensor. The processing device processes the image data obtained by the optical sensors and determines the amount of overlap of the images obtained by adjacent optical sensors. Once the amount of overlap has been determined, the processing device uses the determined amount of overlap to construct a duplicate of the original image. Preferably, sub-arrays of data suspected of overlapping are correlated to obtain values of a correlation array. The values of the correlation array are then analyzed to determine which data in the sub-arrays is overlapping image data. The overlap is then eliminated to construct a duplication of the original image.
摘要:
An analog, fully integrated, partial response maximum likelihood (PRML) read channel utilizing a high-performance analog delay line, an analog adaptive equalizer and an analog Viterbi detector is provided, resulting in saved space, performance gains, and lower power consumption. For signal detection and reconstruction used in read operations, the partial response maximum likelihood (PRML) read channel includes a variable gain amplifier coupled to a lowpass filter for input to an adaptive analog equalizer. The adaptive analog equalizer comprises an analog delay line and an analog feedforward equalizer (FFE). An analog Viterbi detector employs maximum-likelihood sequence estimation (MLSE) techniques to performs the signal detection function. A decoder/descrambler produces a final reconstructed signal. The analog implementation of a partial response maximum likelihood (PRML) read channel also includes a scrambler/encoder coupled to a write precompensation circuit for output to a separate write head.
摘要:
A mixed analog and digital integrated circuit with features which are especially useful for application as a front end for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs. The integrated circuit has 5 signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has 2 digital serial input lines and 2 digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to 6 compatible devices can be serially connected in a chain.