公开(公告)号：US07723183B2

公开(公告)日：2010-05-25

申请号：US12499248

申请日：2009-07-08

申请人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Soo Kim ,  Dong Kyun Lee

发明人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Soo Kim ,  Dong Kyun Lee

IPC分类号： H01L21/02

CPC分类号： H01L28/65 ,  H01L27/10852 ,  H01L28/91

摘要： A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper portion of the storage node contact plug. A tapering layer is deposited over the mold insulation layer including the hole. The tapering layer and the buffer oxide layer are etched back so that the tapering layer is remained only at the upper end portion of the etched hole. A metal storage node layer formed on the etched hole over the remaining tapering layer. The mold insulation layer and the remaining tapering layer are removed to form a cylindrical storage node having a tapered upper end. A dielectric layer and a plate node are formed over the storage node.

摘要翻译： 通过在具有存储节点接触插塞的半导体衬底上形成缓冲氧化物层，蚀刻停止层和模具绝缘层来制造电容器。 蚀刻模具绝缘层和蚀刻停止层，以在存储节点接触插塞的上部形成孔。 在包括孔的模具绝缘层上沉积渐缩层。 锥形层和缓冲氧化物层被回蚀刻，使得锥形层仅保留在蚀刻孔的上端部。 在剩余的锥形层上形成在蚀刻孔上的金属储存节点层。 去除模具绝缘层和剩余的锥形层以形成具有锥形上端的圆柱形存储节点。 在存储节点上形成介电层和板状节点。

公开(公告)号：US07638407B2

公开(公告)日：2009-12-29

申请号：US12265759

申请日：2008-11-06

申请人： Cheol Hwan Park ,  Ho Jin Cho ,  Jae Soo Kim ,  Dong Kyun Lee

发明人： Cheol Hwan Park ,  Ho Jin Cho ,  Jae Soo Kim ,  Dong Kyun Lee

IPC分类号： H01L21/20

CPC分类号： H01L28/91

摘要： Forming a capacitor of a semiconductor device includes forming an interlayer dielectric having holes over a semiconductor substrate. A conductive layer is then formed on surfaces of the holes and on the upper surface of the interlayer dielectric. A silicon-containing conductive layer is formed by flowing a silicon source gas for the semiconductor substrate formed with the conductive layer, so that silicon atoms can penetrate into the conductive layer. The silicon-containing conductive layer prevents etchant from infiltrating the interlayer dielectric below the silicon-containing conductive layer.

摘要翻译： 形成半导体器件的电容器包括在半导体衬底上形成具有孔的层间电介质。 然后在孔的表面和层间电介质的上表面上形成导电层。 通过使形成有导电层的半导体衬底的硅源气体流动而形成含硅导电层，使得硅原子能够渗透到导电层中。 含硅导电层防止蚀刻剂渗透到含硅导电层之下的层间电介质。

公开(公告)号：US07576383B2

公开(公告)日：2009-08-18

申请号：US11779093

申请日：2007-07-17

申请人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Soo Kim ,  Dong Kyun Lee

发明人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Soo Kim ,  Dong Kyun Lee

IPC分类号： H01L27/108

CPC分类号： H01L28/65 ,  H01L27/10852 ,  H01L28/91

摘要： A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper portion of the storage node contact plug. A tapering layer is deposited over the mold insulation layer including the hole. The tapering layer and the buffer oxide layer are etched back so that the tapering layer is remained only at the upper end portion of the etched hole. A metal storage node layer formed on the etched hole over the remaining tapering layer. The mold insulation layer and the remaining tapering layer are removed to form a cylindrical storage node having a tapered upper end. A dielectric layer and a plate node are formed over the storage node.

摘要翻译： 通过在具有存储节点接触插塞的半导体衬底上形成缓冲氧化物层，蚀刻停止层和模具绝缘层来制造电容器。 蚀刻模具绝缘层和蚀刻停止层，以在存储节点接触插塞的上部形成孔。 在包括孔的模具绝缘层上沉积渐缩层。 锥形层和缓冲氧化物层被回蚀刻，使得锥形层仅保留在蚀刻孔的上端部。 在剩余的锥形层上形成在蚀刻孔上的金属储存节点层。 去除模具绝缘层和剩余的锥形层以形成具有锥形上端的圆柱形存储节点。 在存储节点上形成介电层和板状节点。

公开(公告)号：US08470668B2

公开(公告)日：2013-06-25

申请号：US12979926

申请日：2010-12-28

申请人： Ho Jin Cho ,  Cheol Hwan Park ,  Dong Kyun Lee

发明人： Ho Jin Cho ,  Cheol Hwan Park ,  Dong Kyun Lee

IPC分类号： H01L21/8242

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/90

摘要： An embodiment of the invention includes a pillar type capacitor where a pillar is formed over an upper portion of a storage node contact. A bottom electrode is formed over sidewalls of the pillar, and a dielectric film is formed over pillar and the bottom electrode. A top electrode is then formed over the upper portion of the dielectric film.

摘要翻译： 本发明的实施例包括柱形电容器，其中柱形成在存储节点接触件的上部上。 底部电极形成在支柱的侧壁上，电介质膜形成在支柱和底部电极之上。 然后在电介质膜的上部上形成顶部电极。

公开(公告)号：US07985645B2

公开(公告)日：2011-07-26

申请号：US12649610

申请日：2009-12-30

申请人： Cheol Hwan Park ,  Ho Jin Cho ,  Dong Kyun Lee

发明人： Cheol Hwan Park ,  Ho Jin Cho ,  Dong Kyun Lee

IPC分类号： H01L21/8242

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conductive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

摘要翻译： 提出了具有高方位圆柱形电容器的半导体器件及其制造方法。 高档圆柱型电容器是一种稳定的结构，不容易造成保护环中的掩体缺陷和损失。 半导体器件包括圆柱形电容器结构，存储节点氧化物，保护环孔，导电层和封盖氧化物。 单元区域中的圆柱型电容器结构包括圆筒形下电极，电介质和上电极。 存储节点氧化物位于半导体衬底上的周边区域中。 导电层涂覆保护环孔。 在与半导体基板上的单元区域相邻的周边区域的边界处的保护环孔。 覆盖氧化物部分地填充导电层的一部分。 间隙填充膜填充在导电层的其余部分。

公开(公告)号：US08148764B2

公开(公告)日：2012-04-03

申请号：US13185873

申请日：2011-07-19

申请人： Cheol Hwan Park ,  Ho Jin Cho ,  Dong Kyun Lee

发明人： Cheol Hwan Park ,  Ho Jin Cho ,  Dong Kyun Lee

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10894

摘要： A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conducive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

摘要翻译： 提出了具有高方位圆柱形电容器的半导体器件及其制造方法。 高档圆柱型电容器是一种稳定的结构，不容易造成保护环中的掩体缺陷和损失。 半导体器件包括圆柱形电容器结构，存储节点氧化物，保护环孔，导电层和封盖氧化物。 单元区域中的圆柱型电容器结构包括圆筒形下电极，电介质和上电极。 存储节点氧化物位于半导体衬底上的周边区域中。 导电层涂覆保护环孔。 在与半导体基板上的单元区域相邻的周边区域的边界处的保护环孔。 覆盖氧化物部分地填充导电层的一部分。 间隙填充膜填充在导电层的其余部分。

公开(公告)号：US07906419B2

公开(公告)日：2011-03-15

申请号：US12275332

申请日：2008-11-21

申请人： Jae Soo Kim ,  Cheol Hwan Park ,  Ho Jin Cho

发明人： Jae Soo Kim ,  Cheol Hwan Park ,  Ho Jin Cho

IPC分类号： H01L21/3205

CPC分类号： H01L21/268 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66621

摘要： A laser annealing method for manufacturing a semiconductor device is presented. The method includes at least two forming steps and one annealing step. The first forming steps includes forming gates on a semiconductor substrate. The second forming step includes forming an insulation layer on the semiconductor substrate and on the gates. The annealing step includes annealing the insulation layer using electromagnetic radiation emitted from a laser.

摘要翻译： 提出了一种用于制造半导体器件的激光退火方法。 该方法包括至少两个形成步骤和一个退火步骤。 第一形成步骤包括在半导体衬底上形成栅极。 第二形成步骤包括在半导体衬底上和栅极上形成绝缘层。 退火步骤包括使用从激光发射的电磁辐射对绝缘层进行退火。

公开(公告)号：US08476688B2

公开(公告)日：2013-07-02

申请号：US12244115

申请日：2008-10-02

申请人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Wook Seo ,  Jong Kuk Kim

发明人： Ho Jin Cho ,  Cheol Hwan Park ,  Jae Wook Seo ,  Jong Kuk Kim

IPC分类号： H01L31/113

CPC分类号： H01L28/91 ,  H01L27/10852

摘要： A semiconductor device that prevents the leaning of storage node when forming a capacitor having high capacitance includes a plurality of cylinder-shaped storage nodes formed over a semiconductor substrate; and support patterns formed to fix the storage nodes in the form of an ‘L’ or a ‘+’ when viewed from the top. This semiconductor device having support patterns in the form of an ‘L’ or a ‘+’ reduces stress on the storage nodes when subsequently forming a dielectric layer and plate nodes that prevents the capacitors from leaking.

摘要翻译： 当形成具有高电容的电容器时，防止存储节点倾斜的半导体器件包括形成在半导体衬底上的多个圆柱形存储节点; 以及当从顶部观察时，形成为以“L”或“+”的形式固定存储节点的支撑图案。 具有“L”或“+”形式的支撑图案的这种半导体器件随后形成介电层并且防止电容器泄漏的板节点减小了存储节点上的应力。

公开(公告)号：US06955974B2

公开(公告)日：2005-10-18

申请号：US10877714

申请日：2004-06-25

申请人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Ho Jin Cho ,  Eun A Lee

发明人： Tae Hyeok Lee ,  Cheol Hwan Park ,  Dong Su Park ,  Ho Jin Cho ,  Eun A Lee

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/8242

CPC分类号： H01L21/76224 ,  H01L27/10894

摘要： A method for forming an isolation layer of a semiconductor device, which comprises the steps of: a) sequentially forming a pad oxide layer and a pad nitride layer on a silicon substrate; b) etching the pad nitride layer, the pad oxide layer, and the silicon substrate, thereby forming a trench; c) thermal-oxidizing the resultant substrate to form a sidewall oxide layer on a surface of the trench; d) nitrifying the sidewall oxide layer through the use of NH3 annealing; e) depositing a liner aluminum nitride layer on an entire surface of the silicon substrate inclusive of the nitrated sidewall oxide layer; f) depositing a buried oxide layer on the liner aluminum nitride layer to fill the trench; g) performing a chemical mechanical polishing process with respect to the buried oxide layer; and h) eliminating the pad nitride layer.

摘要翻译： 一种用于形成半导体器件的隔离层的方法，包括以下步骤：a）在硅衬底上依次形成焊盘氧化物层和衬垫氮化物层; b）蚀刻衬垫氮化物层，衬垫氧化物层和硅衬底，从而形成沟槽; c）热氧化所得衬底以在沟槽的表面上形成侧壁氧化物层; d）通过使用NH 3退火对侧壁氧化物层进行硝化; e）在包括所述硝化侧壁氧化物层的所述硅衬底的整个表面上沉积衬里氮化铝层; f）在衬里氮化铝层上沉积掩埋氧化物层以填充沟槽; g）对所述掩埋氧化物层进行化学机械抛光工艺; 以及h）消除所述衬垫氮化物层。

公开(公告)号：US20150235799A1

公开(公告)日：2015-08-20

申请号：US14185651

申请日：2014-02-20

申请人： Chris Jozwiak ,  Cheol Hwan Park ,  Kenneth Gotlieb ,  Steven Gwon Sheng Louie ,  Zahid Hussain ,  Alessandra Lanzara

发明人： Chris Jozwiak ,  Cheol Hwan Park ,  Kenneth Gotlieb ,  Steven Gwon Sheng Louie ,  Zahid Hussain ,  Alessandra Lanzara

IPC分类号： H01J1/34 ,  H01J43/18 ,  H01J40/16 ,  H01J1/36

CPC分类号： H01L29/66007 ,  G21K1/16 ,  H01J1/34 ,  H01L29/66984

摘要： One or more embodiments relate generally to the field of photoelectron spin and, more specifically, to a method and system for creating a controllable spin-polarized electron source. One preferred embodiment of the invention generally comprises: method for creating a controllable spin-polarized electron source comprising the following steps: providing one or more materials, the one or more materials having at least one surface and a material layer adjacent to said surface, wherein said surface comprises highly spin-polarized surface electrons, wherein the direction and spin of the surface electrons are locked together; providing at least one incident light capable of stimulating photoemission of said surface electrons; wherein the photon polarization of said incident light is tunable; and inducing photoemission of the surface electron states.

摘要翻译： 一个或多个实施方案一般涉及光电子自旋的领域，更具体地涉及用于产生可控自旋极化电子源的方法和系统。 本发明的一个优选实施方案通常包括：用于产生可控自旋极化电子源的方法，包括以下步骤：提供一种或多种材料，所述一种或多种材料具有至少一个表面和与所述表面相邻的材料层，其中 所述表面包括高度自旋极化的表面电子，其中表面电子的方向和自旋锁定在一起; 提供能够刺激所述表面电子的光电子发射的至少一个入射光; 其中所述入射光的光子偏振是可调的; 并诱导表面电子态的光电子发射。