公开(公告)号：US07481910B2

公开(公告)日：2009-01-27

申请号：US10880675

申请日：2004-06-30

申请人： Hsien-Ping Feng ,  Ming-Yuang Cheng ,  Si-Kwua Cheng ,  Steven Lin ,  Jung-Chih Tsao ,  Chen-Peng Fan ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Ming-Yuang Cheng ,  Si-Kwua Cheng ,  Steven Lin ,  Jung-Chih Tsao ,  Chen-Peng Fan ,  Chi-Wen Liu

IPC分类号： C25D17/00 ,  B01D29/56

CPC分类号： H01L21/2885 ,  C25D21/06 ,  C25D21/18

摘要： A method of stabilizing plating film impurities in an electrochemical plating bath solution is disclosed. The method includes providing an electrochemical plating machine in which an electrochemical plating process is carried out. A by-product bath solution is formed by continually removing a pre-filtered bath solution from the machine and removing an additive from the pre-filtered bath solution. A clean bath solution is formed by removing an additive by-product from the by-product bath solution. An additive bath solution is formed by adding a fresh additive to the clean bath solution. The additive bath solution is added to the electrochemical plating machine. An apparatus for stabilizing film impurities in an electrochemical plating bath solution is also disclosed.

摘要翻译： 公开了一种在电化学镀浴溶液中稳定镀膜杂质的方法。 该方法包括提供其中进行电化学电镀处理的电化学电镀机。 通过从机器中连续除去预过滤的浴液并从预过滤的浴液中除去添加剂形成副产物浴溶液。 通过从副产物浴溶液中除去添加剂副产物形成清洁浴溶液。 通过向清洁浴溶液中加入新鲜添加剂形成添加浴溶液。 将添加浴溶液加入到电化学电镀机中。 还公开了一种用于稳定电化学镀浴溶液中的膜杂质的装置。

公开(公告)号：US20060105565A1

公开(公告)日：2006-05-18

申请号：US10987713

申请日：2004-11-12

申请人： Chi-Wen Liu ,  Hsien-Ping Feng ,  Jung-Chih Tsao

发明人： Chi-Wen Liu ,  Hsien-Ping Feng ,  Jung-Chih Tsao

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76877 ,  C25D3/38 ,  C25D5/10 ,  C25D5/50 ,  C25D7/123 ,  H01L21/2885

摘要： The disclosure relates to a method and apparatus for enhancing copper film quality with a two-step deposition. The two step deposition may include depositing a first copper film by electrochemical plating, annealing the first copper film at a desired temperature for a duration of time to remove any impurities, depositing a second copper film and annealing the second copper film for a duration of time to remove impurities. The second copper film can be deposited by electrochemical plating without HCl/C-based additive. The second copper film can also be deposited by sputtering to avoid impurities including C, Cl and S.

摘要翻译： 本发明涉及一种通过两步沉积来提高铜膜质量的方法和装置。 两级沉积可以包括通过电化学电镀沉积第一铜膜，在所需温度下将第一铜膜退火一段时间以除去任何杂质，沉积第二铜膜并使第二铜膜退火一段时间 去除杂质。 第二个铜膜可以通过不含HCl / C基添加剂的电化学电镀沉积。 也可以通过溅射沉积第二铜膜以避免包括C，Cl和S在内的杂质。

公开(公告)号：US07122471B2

公开(公告)日：2006-10-17

申请号：US10835315

申请日：2004-04-28

申请人： Jung-Chih Tsao ,  Chi-Wen Liu ,  Si-Kua Cheng ,  Che-Tsao Wang ,  Steven Lin ,  Hsien-Ping Feng ,  Chen-Peng Fan

发明人： Jung-Chih Tsao ,  Chi-Wen Liu ,  Si-Kua Cheng ,  Che-Tsao Wang ,  Steven Lin ,  Hsien-Ping Feng ,  Chen-Peng Fan

IPC分类号： H01L21/44 ,  H01L21/42 ,  H01L21/268 ,  H01L21/428

CPC分类号： H01L21/68728 ,  H01L21/67109 ,  H01L21/68707 ,  H01L21/76877

摘要： A novel method for preventing the formation of voids in metal interconnects fabricated on a wafer, particularly during a thermal anneal process, is disclosed. The method includes fabricating metal interconnects between metal lines on a wafer. During a thermal anneal process carried out to reduce electrical resistance of the interconnects, the wafer is positioned in spaced-apart relationship to a wafer heater. This spacing configuration facilitates enhanced stabilility and uniformity in heating of the wafer by reducing the presence of particles on and providing a uniform flow of heated air or gas against and the wafer backside. This eliminates or at least substantially reduces the formation of voids in the interconnects during the anneal process.

摘要翻译： 公开了一种用于防止在晶片上制造的金属互连中空隙形成的新方法，特别是在热退火工艺期间。 该方法包括在晶片上的金属线之间制造金属互连。 在进行用于降低互连的电阻的热退火工艺期间，晶片以与晶片加热器隔开的关系定位。 这种间隔结构通过减少加热的空气或气体抵靠和晶片背面的颗粒的存在而提高晶片加热的稳定性和均匀性。 这在退火过程中消除或至少基本上减少了互连件中空隙的形成。

公开(公告)号：US20060000717A1

公开(公告)日：2006-01-05

申请号：US10880675

申请日：2004-06-30

申请人： Hsien-Ping Feng ,  Ming-Yuang Cheng ,  Si-Kwua Cheng ,  Steven Lin ,  Jung-Chih Tsao ,  Chen-Peng Fan ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Ming-Yuang Cheng ,  Si-Kwua Cheng ,  Steven Lin ,  Jung-Chih Tsao ,  Chen-Peng Fan ,  Chi-Wen Liu

IPC分类号： C25D21/06

CPC分类号： H01L21/2885 ,  C25D21/06 ,  C25D21/18

摘要： A method of stabilizing plating film impurities in an electrochemical plating bath solution is disclosed. The method includes providing an electrochemical plating machine in which an electrochemical plating process is carried out. A by-product bath solution is formed by continually removing a pre-filtered bath solution from the machine and removing an additive from the pre-filtered bath solution. A clean bath solution is formed by removing an additive by-product from the by-product bath solution. An additive bath solution is formed by adding a fresh additive to the clean bath solution. The additive bath solution is added to the electrochemical plating machine. An apparatus for stabilizing film impurities in an electrochemical plating bath solution is also disclosed.

公开(公告)号：US07030016B2

公开(公告)日：2006-04-18

申请号：US10812729

申请日：2004-03-30

申请人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

IPC分类号： H01L21/44

CPC分类号： H01L21/76877 ,  H01L21/2885

摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

摘要翻译： 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层 - 过度填充沟槽。 在第二退火步骤之后，CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

公开(公告)号：US20050227479A1

公开(公告)日：2005-10-13

申请号：US10812729

申请日：2004-03-30

申请人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

IPC分类号： H01L21/311 ,  H01L21/768

CPC分类号： H01L21/76877 ,  H01L21/2885

摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

摘要翻译： 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层 - 过度填充沟槽。 在第二退火步骤之后，CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

公开(公告)号：US20060216930A1

公开(公告)日：2006-09-28

申请号：US11347946

申请日：2006-02-06

申请人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/2885

摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

摘要翻译： 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层超过沟槽。 在第二退火步骤之后，CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

公开(公告)号：US20050245064A1

公开(公告)日：2005-11-03

申请号：US10835315

申请日：2004-04-28

申请人： Jung-Chih Tsao ,  Chi-Wen Liu ,  Si-Kua Cheng ,  Che-Tsao Wang ,  Steven Lin ,  Hsien-Ping Feng ,  Chen-Peng Fan

发明人： Jung-Chih Tsao ,  Chi-Wen Liu ,  Si-Kua Cheng ,  Che-Tsao Wang ,  Steven Lin ,  Hsien-Ping Feng ,  Chen-Peng Fan

IPC分类号： H01L21/00 ,  H01L21/4763 ,  H01L21/687 ,  H01L21/768

CPC分类号： H01L21/68728 ,  H01L21/67109 ,  H01L21/68707 ,  H01L21/76877

摘要： A novel method for preventing the formation of voids in metal interconnects fabricated on a wafer, particularly during a thermal anneal process, is disclosed. The method includes fabricating metal interconnects between metal lines on a wafer. During a thermal anneal process carried out to reduce electrical resistance of the interconnects, the wafer is positioned in spaced-apart relationship to a wafer heater. This spacing configuration facilitates enhanced stabilility and uniformity in heating of the wafer by reducing the presence of particles on and providing a uniform flow of heated air or gas against and the wafer backside. This eliminates or at least substantially reduces the formation of voids in the interconnects during the anneal process.

摘要翻译： 公开了一种用于防止在晶片上制造的金属互连中空隙形成的新方法，特别是在热退火工艺期间。 该方法包括在晶片上的金属线之间制造金属互连。 在进行用于降低互连的电阻的热退火工艺期间，晶片以与晶片加热器隔开的关系定位。 这种间隔结构通过减少加热的空气或气体抵靠和晶片背面的颗粒的存在而提高晶片加热的稳定性和均匀性。 这在退火过程中消除或至少基本上减少了互连件中空隙的形成。

公开(公告)号：US07432192B2

公开(公告)日：2008-10-07

申请号：US11347946

申请日：2006-02-06

申请人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

发明人： Hsien-Ping Feng ,  Jung-Chih Tsao ,  Hsi-Kuei Cheng ,  Chih-Tsung Lee ,  Ming-Yuan Cheng ,  Steven Lin ,  Ray Chuang ,  Chi-Wen Liu

IPC分类号： H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/2885

摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

摘要翻译： 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层超过沟槽。 在第二退火步骤之后，CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

公开(公告)号：US07189650B2

公开(公告)日：2007-03-13

申请号：US10987713

申请日：2004-11-12

申请人： Chi-Wen Liu ,  Hsien-Ping Feng ,  Jung-Chih Tsao

发明人： Chi-Wen Liu ,  Hsien-Ping Feng ,  Jung-Chih Tsao

IPC分类号： H01L21/44

CPC分类号： H01L21/76877 ,  C25D3/38 ,  C25D5/10 ,  C25D5/50 ,  C25D7/123 ,  H01L21/2885

摘要： The disclosure relates to a method and apparatus for enhancing copper film quality with a two-step deposition. The two step deposition may include depositing a first copper film by electrochemical plating, annealing the first copper film at a desired temperature for a duration of time to remove any impurities, depositing a second copper film and annealing the second copper film for a duration of time to remove impurities. The second copper film can be deposited by electrochemical plating without HCl/C-based additive. The second copper film can also be deposited by sputtering to avoid impurities including C, Cl and S.

摘要翻译： 本发明涉及一种通过两步沉积来提高铜膜质量的方法和装置。 两级沉积可以包括通过电化学电镀沉积第一铜膜，在所需温度下将第一铜膜退火一段时间以除去任何杂质，沉积第二铜膜并使第二铜膜退火一段时间 去除杂质。 第二个铜膜可以通过不含HCl / C基添加剂的电化学电镀沉积。 也可以通过溅射沉积第二铜膜以避免包括C，Cl和S在内的杂质。