公开(公告)号：US07317412B2

公开(公告)日：2008-01-08

申请号：US11434329

申请日：2006-05-15

申请人： Chin Li ,  Donal Bourke ,  Steven Steckler ,  Eoin Carey

发明人： Chin Li ,  Donal Bourke ,  Steven Steckler ,  Eoin Carey

IPC分类号： H03M1/66

CPC分类号： H03M1/1061 ,  H03F2200/504 ,  H03M1/745

摘要： Various techniques for biasing a radio frequency digital-to-analog converter are described. In one embodiment, a baseband processor may comprise a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter. The baseband processor may comprise a serial control interface to generate a programming signal for controlling a relationship among the plurality of base currents. Other embodiments are described and claimed.

摘要翻译： 描述了用于偏置射频数模转换器的各种技术。 在一个实施例中，基带处理器可以包括多个输出驱动器，以产生用于偏置射频数模转换器的多个基极电流。 基带处理器可以包括串行控制接口以产生用于控制多个基极电流之间的关系的编程信号。 描述和要求保护其他实施例。

公开(公告)号：US20070262893A1

公开(公告)日：2007-11-15

申请号：US11434329

申请日：2006-05-15

申请人： Chin Li ,  Donal Bourke ,  Steven Steckler ,  Eoin Carey

发明人： Chin Li ,  Donal Bourke ,  Steven Steckler ,  Eoin Carey

IPC分类号： H03M1/66

CPC分类号： H03M1/1061 ,  H03F2200/504 ,  H03M1/745

摘要： Various techniques for biasing a radio frequency digital-to-analog converter are described. In one embodiment, a baseband processor may comprise a plurality of output drivers to generate a plurality of base currents for biasing a radio frequency digital-to-analog converter. The baseband processor may comprise a serial control interface to generate a programming signal for controlling a relationship among the plurality of base currents. Other embodiments are described and claimed.

摘要翻译： 描述了用于偏置射频数模转换器的各种技术。 在一个实施例中，基带处理器可以包括多个输出驱动器，以产生用于偏置射频数模转换器的多个基极电流。 基带处理器可以包括串行控制接口以产生用于控制多个基极电流之间的关系的编程信号。 描述和要求保护其他实施例。

公开(公告)号：US20060255997A1

公开(公告)日：2006-11-16

申请号：US11398286

申请日：2006-04-04

申请人： Chin Li ,  Paul Sheehy ,  Eoin Carey ,  Gerard Quilligan ,  Walid Mohamed Ahmed

发明人： Chin Li ,  Paul Sheehy ,  Eoin Carey ,  Gerard Quilligan ,  Walid Mohamed Ahmed

IPC分类号： H03M1/12

CPC分类号： H04W52/52 ,  H03F1/26 ,  H03F3/211 ,  H03F3/24 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/331 ,  H03F2203/45356 ,  H03H11/1291 ,  H03H11/245 ,  H03M1/0854 ,  H03M1/66

摘要： A differential analog filter includes a differential input that includes a first input node and a second input node and a differential output that includes a first output node and a second output node. A fully differential amplifier includes a non-inverting input node and an inverting input node coupled to the differential input. The fully differential amplifier includes a non-inverting output node and an inverting output node coupled to the differential output. A first feedback network is coupled between the non-inverting output node and the inverting input node of the fully differential amplifier. A second feedback network is coupled between the inverting output node and the non-inverting input node of the fully differential amplifier.

摘要翻译： 差分模拟滤波器包括包括第一输入节点和第二输入节点的差分输入以及包括第一输出节点和第二输出节点的差分输出。 全差分放大器包括非反相输入节点和耦合到差分输入的反相输入节点。 全差分放大器包括非反相输出节点和耦合到差分输出的反相输出节点。 第一反馈网络耦合在非反相输出节点和全差分放大器的反相输入节点之间。 第二反馈网络耦合在全差分放大器的反相输出节点和非反相输入节点之间。

公开(公告)号：US20060255996A1

公开(公告)日：2006-11-16

申请号：US11398060

申请日：2006-04-04

申请人： Chin Li ,  Paul Sheehy ,  Eoin Carey ,  Gerard Quilligan ,  Walid Ahmed

发明人： Chin Li ,  Paul Sheehy ,  Eoin Carey ,  Gerard Quilligan ,  Walid Ahmed

IPC分类号： H03M1/12

CPC分类号： H04W52/52 ,  H03F1/26 ,  H03F3/211 ,  H03F3/24 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/331 ,  H03F2203/45356 ,  H03H11/1291 ,  H03H11/245 ,  H03M1/0854 ,  H03M1/66

摘要： A power control module receives a dynamic power control signal and generates a differential bias signal proportional to the dynamic power control signal. An analog multiplexer receives a digital amplitude signal including n bits and receives the differential bias signal. The analog multiplexer multiplexes the digital amplitude signal with the differential bias signal in parallel and generates a first differential signal. A driver module receives the first differential signal and a second differential signal. The driver module generates a first drive signal proportional to the dynamic power control signal when a bit in said digital amplitude signal is a logic one and the driver module generates a second drive signal proportional to the second differential signal when a bit in said digital amplitude signal is a logic zero.

摘要翻译： 功率控制模块接收动态功率控制信号并产生与动态功率控制信号成比例的差分偏置信号。 模拟多路复用器接收包括n位的数字幅度信号并接收差分偏置信号。 模拟多路复用器将数字幅度信号与差分偏置信号并行复用，并产生第一差分信号。 驱动器模块接收第一差分信号和第二差分信号。 当所述数字幅度信号中的位为逻辑1时，驱动器模块产生与动态功率控制信号成比例的第一驱动信号，并且当所述数字幅度信号中的位为逻辑1时，驱动器模块产生与第二差分信号成比例的第二驱动信号 是逻辑0。

公开(公告)号：US08233852B2

公开(公告)日：2012-07-31

申请号：US12098290

申请日：2008-04-04

申请人： Walid K. M. Ahmed ,  Eoin Carey ,  Qing Li ,  Ajit K. Reddy

发明人： Walid K. M. Ahmed ,  Eoin Carey ,  Qing Li ,  Ajit K. Reddy

IPC分类号： H03C1/62

CPC分类号： H03F3/24 ,  H03F1/3247

摘要： An apparatus may include a non-linear module, a control module, and a calibration module. The non-linear module produces an output signal from an input signal. The control module selects, upon an occurrence of a calibration condition, a calibration operation from two or more calibration operations. Each of the two or more calibration operations may generate one or more correction values for the non-linear module. Further, each of the calibration operations produces the input signal from a pre-input signal. This selected calibration operation is performed by the calibration module. The two or more calibration operations include a first calibration operation and a second calibration operation. The first calibration operation produces the input signal from the pre-input signal according to a predictive technique. The second calibration operation produces the input signal from the pre-input signal according to a non-predictive technique.

摘要翻译： 装置可以包括非线性模块，控制模块和校准模块。 非线性模块从输入信号产生输出信号。 控制模块在出现校准条件时，从两个或多个校准操作中选择校准操作。 两个或更多个校准操作中的每一个可以为非线性模块生成一个或多个校正值。 此外，每个校准操作从预输入信号产生输入信号。 该选择的校准操作由校准模块执行。 两个或多个校准操作包括第一校准操作和第二校准操作。 第一校准操作根据预测技术从预输入信号产生输入信号。 第二校准操作根据非预测技术从预输入信号产生输入信号。

公开(公告)号：US20080225984A1

公开(公告)日：2008-09-18

申请号：US12048022

申请日：2008-03-13

申请人： Walid Khairy Mohamed Ahmed ,  Qing Li ,  Ajit Kumar Reddy ,  Eoin Carey

发明人： Walid Khairy Mohamed Ahmed ,  Qing Li ,  Ajit Kumar Reddy ,  Eoin Carey

IPC分类号： H03C3/00 ,  H04L27/12 ,  H03K7/06

CPC分类号： H03K7/10 ,  H03C5/00 ,  H04L25/06 ,  H04L27/34 ,  H04L27/361 ,  H04L27/3863 ,  H04L27/389

摘要： A digital polar transmitter includes a baseband processor configured to receive an input signal and to convert the input signal into a baseband amplitude component and a baseband phase component. The transmitter also includes a phase modulator in communication with the baseband processor. The phase modulator is configured to modulate an RF carrier signal based on the phase component and to generate a phase-modulated RF carrier signal. A power amplifier is provided in communication with the baseband processor and the phase modulator. The power amplifier is configured to amplify the phase-modulated RF carrier signal based on the baseband amplitude component and to generate an amplified RF signal. The transmitter also includes a digital feedback loop in communication with the power amplifier and the baseband processor. The digital feedback loop is configured to detect the amplified RF signal and to provide a digital amplitude feedback signal and a detected phase feedback signal to the baseband processor.

摘要翻译： 数字极化发射机包括：基带处理器，被配置为接收输入信号并将输入信号转换成基带振幅分量和基带相位分量。 发射机还包括与基带处理器通信的相位调制器。 相位调制器被配置为基于相位分量来调制RF载波信号并且产生相位调制的RF载波信号。 提供与基带处理器和相位调制器通信的功率放大器。 功率放大器被配置为基于基带幅度分量来放大相位调制的RF载波信号并产生放大的RF信号。 发射机还包括与功率放大器和基带处理器通信的数字反馈回路。 数字反馈回路被配置为检测放大的RF信号，并向基带处理器提供数字幅度反馈信号和检测的相位反馈信号。

公开(公告)号：US07190290B2

公开(公告)日：2007-03-13

申请号：US10925191

申请日：2004-08-24

申请人： Eoin Carey ,  Bernie Mullins

发明人： Eoin Carey ,  Bernie Mullins

IPC分类号： H03M1/06

CPC分类号： H03F3/19 ,  H03F1/302 ,  H03M1/0604 ,  H03M1/742

摘要： An apparatus and method for biasing at least one transistor of a Radio Frequency Digital to Analog Converter (RFDAC). The apparatus including a direct base current injection circuit for injecting a DC current waveform directly into a base terminal of the transistor.

摘要翻译： 一种用于偏置射频数模转换器（RFDAC）的至少一个晶体管的装置和方法。 该装置包括直流基极电流注入电路，用于将直流电流波形直接注入晶体管的基极端子。

公开(公告)号：US20060055573A1

公开(公告)日：2006-03-16

申请号：US10925191

申请日：2004-08-24

申请人： Eoin Carey ,  Bernie Mullins

发明人： Eoin Carey ,  Bernie Mullins

IPC分类号： H03M1/66

CPC分类号： H03F3/19 ,  H03F1/302 ,  H03M1/0604 ,  H03M1/742

摘要： An apparatus and method for biasing at least one transistor of a Radio Frequency Digital to Analog Converter (RFDAC). The apparatus including a direct base current injection circuit for injecting a DC current waveform directly into a base terminal of the transistor.

摘要翻译： 一种用于偏置射频数模转换器（RFDAC）的至少一个晶体管的装置和方法。 该装置包括直流基极电流注入电路，用于将直流电流波形直接注入晶体管的基极端子。

公开(公告)号：US08884714B2

公开(公告)日：2014-11-11

申请号：US11315090

申请日：2005-12-22

申请人： Eoin Carey ,  Pierce Joseph Nagle

发明人： Eoin Carey ,  Pierce Joseph Nagle

IPC分类号： H03C3/38 ,  H03C5/00

CPC分类号： H03C5/00

摘要： An amplifier receives an amplitude signal of a polar modulated signal at a base terminal of a transistor and receives a phase modulated carrier signal of the polar modulated signal at the base terminal of the transistor. The amplifier combines the amplitude signal and the phase modulated signal to produce a full complex waveform at a collector terminal of the transistor.

摘要翻译： 放大器在晶体管的基极端接收极化调制信号的振幅信号，并在晶体管的基极端接收极化调制信号的相位调制载波信号。 放大器组合幅度信号和相位调制信号，以在晶体管的集电极端产生完整的复杂波形。

公开(公告)号：US20090122911A1

公开(公告)日：2009-05-14

申请号：US11937270

申请日：2007-11-08

申请人： Eoin Carey

发明人： Eoin Carey

IPC分类号： H04L25/03 ,  H04L25/49

CPC分类号： H04L27/368 ,  H04L27/364

摘要： A system and method for modulating and amplifying an input signal are provided in a communication transmitter. The transmitter includes a pre-distortion lookup table containing pre-distortion lookup data. An auto-calibration module is in communication with the pre-distortion lookup table. The auto-calibration module is configured to operate during a closed-loop auto-calibration interval and to calibrate the pre-distortion lookup data to compensate for a non-linearity in the transmitter. A baseband processor is in communication with the pre-distortion lookup table. The baseband processor is configured to receive an input signal and to generate a pre-distorted baseband I/Q signal pair. The pre-distortion is based on the pre-distortion lookup data during an open-loop operational interval. An I/Q modulator is in communication with the baseband processor. The I/Q modulator is configured to modulate an RF carrier signal based on the pre-distorted baseband I/Q signal pair and to generate a pre-distorted, modulated RF carrier signal. A power amplifier is in communication with the baseband processor and the I/Q modulator. The power amplifier is configured to amplify the corrected, modulated RF carrier signal and to generate an amplified RF signal. A digital feedback path in communication with the power amplifier and the baseband processor. The digital feedback path is configured to provide a feedback signal to the baseband processor during the closed-loop auto-calibration interval.

摘要翻译： 在通信发射机中提供用于调制和放大输入信号的系统和方法。 发射机包括包含预失真查找数据的预失真查找表。 自动校准模块与预失真查找表通信。 自动校准模块配置为在闭环自动校准间隔期间运行，并校准预失真查找数据以补偿发射机中的非线性。 基带处理器与预失真查找表通信。 基带处理器被配置为接收输入信号并产生预失真的基带I / Q信号对。 预失真基于开环操作间隔期间的预失真查找数据。 I / Q调制器与基带处理器通信。 I / Q调制器被配置为基于预失真的基带I / Q信号对来调制RF载波信号，并且产生预失真的经调制的RF载波信号。 功率放大器与基带处理器和I / Q调制器通信。 功率放大器被配置为放大经校正的经调制的RF载波信号并产生放大的RF信号。 与功率放大器和基带处理器通信的数字反馈路径。 数字反馈路径被配置为在闭环自动校准间隔期间向基带处理器提供反馈信号。