RECEIVER START-UP COMPENSATION CIRCUIT
    2.
    发明申请
    RECEIVER START-UP COMPENSATION CIRCUIT 有权
    接收器启动补偿电路

    公开(公告)号:US20070273434A1

    公开(公告)日:2007-11-29

    申请号:US11420771

    申请日:2006-05-29

    IPC分类号: G05F1/10

    CPC分类号: G05F3/262

    摘要: An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.

    摘要翻译: 一种集成电路包括用于在输出端提供电流的电流镜电路,耦合到电流镜电路的输出端的掉电开关,用于根据在电流镜电路中接收的信号控制由电流镜电路产生的电流的存取 掉电开关的控制端,以及耦合到电流镜电路的偏置端的补偿单元和用于稳定电流镜电路的偏置端的电压的掉电开关。

    Wafer and test method thereof
    4.
    发明授权
    Wafer and test method thereof 有权
    晶圆及其测试方法

    公开(公告)号:US08274302B2

    公开(公告)日:2012-09-25

    申请号:US12609365

    申请日:2009-10-30

    IPC分类号: G01R31/02 G01R31/26

    摘要: A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.

    摘要翻译: 提供晶片及其测试方法。 本发明利用第一组探针在第一芯片上执行高电压应力(HVS)测试,并且利用第二组探针在第二芯片上进行功能测试,其中高压应力测试的周期重叠 功能测试的一段时间,从而大大降低了晶片的测试时间。

    Receiver start-up compensation circuit
    6.
    发明授权
    Receiver start-up compensation circuit 有权
    接收机启动补偿电路

    公开(公告)号:US07446568B2

    公开(公告)日:2008-11-04

    申请号:US11420771

    申请日:2006-05-29

    IPC分类号: H03K19/0175 H03K19/094

    CPC分类号: G05F3/262

    摘要: An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.

    摘要翻译: 一种集成电路包括用于在输出端提供电流的电流镜电路,耦合到电流镜电路的输出端的掉电开关,用于根据在电流镜电路中接收的信号控制由电流镜电路产生的电流的存取 掉电开关的控制端,以及耦合到电流镜电路的偏置端的补偿单元和用于稳定电流镜电路的偏置端的电压的掉电开关。

    Apparatus for Driving a Display
    7.
    发明申请
    Apparatus for Driving a Display 审中-公开
    用于驾驶显示器的装置

    公开(公告)号:US20080062111A1

    公开(公告)日:2008-03-13

    申请号:US11531350

    申请日:2006-09-13

    IPC分类号: G09G3/36

    CPC分类号: G09G3/3655 G09G2320/0276

    摘要: The present invention discloses an apparatus for driving a display in which each pixels of the display receives a driving voltage and a common voltage, and a luminance of each pixel is determined by a difference between the received driving voltage and the common voltage. The apparatus comprises a plurality of source driver chips, each of which receives a pixel value and generates the driving voltage corresponding to the pixel value according to a plurality of Gamma voltages. The common voltage is generated by at least one of the source driver chips.

    摘要翻译: 本发明公开了一种用于驱动显示器的装置,其中显示器的每个像素接收驱动电压和公共电压,并且每个像素的亮度由接收到的驱动电压和公共电压之间的差确定。 该装置包括多个源极驱动器芯片,每个源极驱动器芯片接收像素值,并根据多个伽马电压产生与像素值对应的驱动电压。 公共电压由至少一个源极驱动器芯片产生。

    A DATA DRIVER
    8.
    发明申请
    A DATA DRIVER 审中-公开
    数据驱动器

    公开(公告)号:US20070159501A1

    公开(公告)日:2007-07-12

    申请号:US11279670

    申请日:2006-04-13

    IPC分类号: G09G5/10

    摘要: A data driver has several gamma-voltage generating circuits and several driving channels. The gamma-voltage generating circuits are used to process gamma-voltages of different colors. Each two groups of the driving channels are correspondingly coupled with the gamma-voltage generating circuit that generates a single color and is separately disposed at either side of the corresponding gamma generating circuit for outputting the gamma-voltages of the same color to a display panel.

    摘要翻译: 一个数据驱动器有几个伽玛电压发生电路和几个驱动通道。 γ电压发生电路用于处理不同颜色的伽马电压。 每两组驱动通道相应地与产生单一颜色的伽玛电压发生电路耦合,并且分别设置在相应伽马发生电路的任一侧,以将相同颜色的伽马电压输出到显示面板。

    DATA TRANSMITTING METHOD FOR TRANSMITTING DATA BETWEEN TIMING CONTROLLER AND SOURCE DRIVER OF DISPLAY AND DISPLAY USING THE SAME
    9.
    发明申请
    DATA TRANSMITTING METHOD FOR TRANSMITTING DATA BETWEEN TIMING CONTROLLER AND SOURCE DRIVER OF DISPLAY AND DISPLAY USING THE SAME 审中-公开
    用于发送定时控制器和显示器的源驱动器之间的数据的数据传输方法

    公开(公告)号:US20110007066A1

    公开(公告)日:2011-01-13

    申请号:US12501211

    申请日:2009-07-10

    IPC分类号: G09G5/00

    摘要: A data transmission method for transmitting data between a timing controller and a source driver of a display and a display using the same are disclosed. The transmission method includes recognizing a start of a blank period of a frame period; sampling de-skew data on a data bus during the blank period based on a data clock; performing a de-skew function by comparing the sampled de-skew data with a predetermined de-skew code and adjusting the data clock; recognizing a start of a data input period of the frame period; and sampling pixel data on the data bus during the data input period based on the adjusted data clock. The display includes a timing controller, a data bus, and a source driver. The source driver is connected to the timing controller via the data bus for performing the data transmission method.

    摘要翻译: 公开了一种用于在定时控制器和显示器的源驱动器和使用其的显示器之间传送数据的数据传输方法。 发送方法包括:识别帧周期的空白期间的开始; 基于数据时钟在空白时段期间在数据总线上采样去偏移数据; 通过将采样的去偏移数据与预定的去偏移码进行比较并调整数据时钟来执行去偏移功能; 识别帧周期的数据输入周期的开始; 并且在数据输入周期期间,基于经调整的数据时钟在数据总线上采样像素数据。 显示器包括定时控制器,数据总线和源驱动器。 源驱动器经由用于执行数据传输方法的数据总线连接到定时控制器。

    OUTPUT BUFFER OF A SOURCE DRIVER APPLIED IN A DISPLAY
    10.
    发明申请
    OUTPUT BUFFER OF A SOURCE DRIVER APPLIED IN A DISPLAY 有权
    显示器中使用的源驱动器的输出缓冲器

    公开(公告)号:US20090251174A1

    公开(公告)日:2009-10-08

    申请号:US12061255

    申请日:2008-04-02

    IPC分类号: H03K3/00

    摘要: An output buffer and a controlling method are disclosed. The output buffer comprises an upper buffer and a lower buffer. In the controlling method, at first, a first voltage (V1) and a second voltage (V2) are applied on the upper buffer, and a third voltage (V3) and a fourth voltage (V4) are applied on the lower buffer, wherein V1>V2, V1>V4, V3>V2, and V3>V4. Then, the upper buffer is operated to output data to a plurality of pixels thereby operating the liquid crystals of the pixels over an upper supply range, wherein the upper supply range is from V1 to V2. Thereafter, the lower buffer is operated to output data to the pixels thereby operating the liquid crystals of the pixels over a lower supply range, wherein the lower supply range is from V3 to V4.

    摘要翻译: 公开了一种输出缓冲器和控制方法。 输出缓冲器包括上缓冲器和下缓冲器。 在控制方法中,首先,在上缓冲器上施加第一电压(V1)和第二电压(V2),在下缓冲器上施加第三电压(V3)和第四电压(V4),其中 V1> V2,V1> V4,V3> V2,V3> V4。 然后,操作上缓冲器以将数据输出到多个像素,从而在上电源范围上操作像素的液晶,其中上电源范围为V1至V2。 此后,操作下缓冲器以向像素输出数据,从而在较低的供给范围上操作像素的液晶,其中较低的供给范围为V3至V4。