Femtocell, femtocell gateway and access rejection method thereof
    1.
    发明授权
    Femtocell, femtocell gateway and access rejection method thereof 有权
    毫微微蜂窝基站,毫微微小区网关及其接入拒绝方法

    公开(公告)号:US08948146B2

    公开(公告)日:2015-02-03

    申请号:US13195260

    申请日:2011-08-01

    摘要: A femtocell, a femtocell gateway and an access rejection method thereof are provided. A wireless network system comprises a wireless device, a plurality of the femtocells, the femtocell gateway and a core network server. The wireless device has a Subscriber Identification and the core network server stores a Closed Subscribers Group Identification of the femtocells. The femtocell gateway receives an access rejection message corresponding to the Subscriber Identification of the wireless device from the core network server, and transmits the access rejection message to the femtocells. Each femtocell records the Subscriber Identification in a rejection list thereof, and it is capable of adding/deleting Subscriber Identifications in its rejection list. When each femtocell receives the Subscriber Identification of the wireless device again and determines that the Subscriber Identification has been recorded in the rejection list thereof, each femtocell immediately terminates a wireless connection from the wireless device.

    摘要翻译: 提供了毫微微小区,毫微微小区网关及其接入拒绝方法。 无线网络系统包括无线设备,多个毫微微小区,毫微微小区网关和核心网络服务器。 无线设备具有订户标识,核心网络服务器存储毫微微小区的封闭用户组标识。 毫微微小区网关从核心网络服务器接收对应于无线设备的用户识别的访问拒绝消息,并将接入拒绝消息发送到毫微微小区。 每个毫微微小区在其拒绝列表中记录订户标识,并且能够在其拒绝列表中添加/删除订户标识。 当每个毫微微蜂窝基站再次接收到无线设备的用户标识并确定用户标识已被记录在其拒绝列表中时,每个毫微微小区立即从无线设备终止无线连接。

    RESISTOR UNIT AND A CIRCUIT INCLUDING THE RESISTOR UNIT
    2.
    发明申请
    RESISTOR UNIT AND A CIRCUIT INCLUDING THE RESISTOR UNIT 审中-公开
    电阻单元和包括电阻器单元的电路

    公开(公告)号:US20100007322A1

    公开(公告)日:2010-01-14

    申请号:US12352553

    申请日:2009-01-12

    申请人: Li-Wei Huang

    发明人: Li-Wei Huang

    IPC分类号: G05F3/08 H01C7/06

    CPC分类号: G05F3/242 G05F3/30

    摘要: A resistor unit is adapted for use in a constant current source circuit or a temperature compensating circuit for providing temperature compensation to a constant voltage reference circuit. The resistor unit includes at least one first resistor, and at least one second resistor coupled to the first resistor. One of the first and second resistors is a positive temperature coefficient resistor. The other one of the first and second resistors is a negative temperature coefficient resistor. Because a temperature characteristic of the first resistor is opposite to that of the second resistor, an effective resistance of the resistor unit changes in a relatively narrower range with temperature.

    摘要翻译: 电阻器单元适用于恒流源电路或温度补偿电路,用于向恒压基准电路提供温度补偿。 电阻器单元包括至少一个第一电阻器和耦合到第一电阻器的至少一个第二电阻器。 第一和第二电阻之一是正温度系数电阻。 第一和第二电阻器中的另一个是负温度系数电阻器。 由于第一电阻器的温度特性与第二电阻器的温度特性相反,所以电阻器单元的有效电阻随温度变化较小。

    Spread spectrum clock generating apparatus
    3.
    发明授权
    Spread spectrum clock generating apparatus 有权
    扩频时钟发生装置

    公开(公告)号:US07791385B2

    公开(公告)日:2010-09-07

    申请号:US12045712

    申请日:2008-03-11

    IPC分类号: H03L7/00

    摘要: A spread spectrum clock generating apparatus is disclosed. The spread spectrum clock generating apparatus includes a phase lock loop module and a spread spectrum module. The phase lock loop module is used for dynamically tuning frequency of an output clock. The spread spectrum module includes a counter, a plurality of delta-sigma counters and a data shifter. These delta-sigma counters accumulate input signals, and enable a first overflow signal while accumulation of a last stage delta-sigma counter is overflowed. The frequency of the output clock can be tuned dynamically according to the first overflow signal, and the spectrum of the output clock can be spread.

    摘要翻译: 公开了一种扩频时钟发生装置。 扩频时钟产生装置包括锁相环模块和扩频模块。 锁相环模块用于动态调整输出时钟的频率。 扩频模块包括计数器,多个Δ-Σ计数器和数据移位器。 这些Δ-Σ计数器累积输入信号,并且在最后一级Δ-Σ计数器的累积溢出时使能第一溢出信号。 可以根据第一个溢出信号动态地调整输出时钟的频率,并且可以扩展输出时钟的频谱。

    SPREAD SPECTRUM CLOCK GENERATING APPARATUS
    4.
    发明申请
    SPREAD SPECTRUM CLOCK GENERATING APPARATUS 有权
    传播频谱钟产生装置

    公开(公告)号:US20090140782A1

    公开(公告)日:2009-06-04

    申请号:US12045712

    申请日:2008-03-11

    IPC分类号: H03L7/06

    摘要: A spread spectrum clock generating apparatus is disclosed. The spread spectrum clock generating apparatus includes a phase lock loop module and a spread spectrum module. The phase lock loop module is used for dynamically tuning frequency of an output clock. The spread spectrum module includes a counter, a plurality of delta-sigma counters and a data shifter. These delta-sigma counters accumulate input signals, and enable a first overflow signal while accumulation of a last stage delta-sigma counter is overflowed. The frequency of the output clock can be tuned dynamically according to the first overflow signal, and the spectrum of the output clock can be spread.

    摘要翻译: 公开了一种扩频时钟发生装置。 扩频时钟产生装置包括锁相环模块和扩频模块。 锁相环模块用于动态调整输出时钟的频率。 扩频模块包括计数器,多个Δ-Σ计数器和数据移位器。 这些Δ-Σ计数器累积输入信号,并且在最后一级Δ-Σ计数器的累积溢出时使能第一溢出信号。 可以根据第一个溢出信号动态地调整输出时钟的频率,并且可以扩展输出时钟的频谱。