摘要:
A cooling system has at least one heat conducting element in thermal contact with an electronic component. A heat exchanger is in fluid communication with the heat conducting element. The heat exchanger is configured to provide a working fluid to the at least one heat conducting element to facilitate dissipation of heat from the respective electronic component. The heat exchanger has a form factor dimensioned and configured for mounting in a preconfigured hardware unit slot of a computer chassis.
摘要:
A cooling system has at least one heat conducting element in thermal contact with an electronic component. A heat exchanger is in fluid communication with the heat conducting element. The heat exchanger is configured to provide a working fluid to the at least one heat conducting element to facilitate dissipation of heat from the respective electronic component. The heat exchanger has a form factor dimensioned and configured for mounting in a preconfigured hardware unit slot of a computer chassis.
摘要:
Techniques are provided for overcoming failures in a memory. One portion of the memory may operate in a single chip spare mode. Upon detection of an error in a single chip in the portion of the memory, a region of the portion of the memory may be converted to operate in a double chip spare mode. The memory may be accessed in both single and double chip spare modes.
摘要:
An embodiment of a multiprocessor computer system comprises main memory, a remote processor capable of accessing the main memory, a remote cache device operative to store accesses by said remote processor to said main memory, and a filter tag cache device associated with the main memory. The filter cache device is operative to store information relating to remote ownership of data in the main memory including ownership by the remote processor. The filter cache device is operative to selectively invalidate filter tag cache entries when space is required in the filter tag cache device for new cache entries. The remote cache device is responsive to events indicating that a cache entry has low value to the remote processor to send a hint to the filter tag cache device. The filter tag cache device is responsive to a hint in selecting a filter tag cache entry to invalidate.
摘要:
A system utilizing an erasure mode in an error correction code algorithm is described that includes non-volatile memory storing a page deallocation table. A memory controller stores and retrieves data from a memory subsystem, and uses an error correction code algorithm to correct data corruption in retrieved data. An error analysis algorithm executed in a processor records instances of data corruption in the page deallocation tables and deallocates memory regions associated with multiple occurrences of data corruption at single bit locations. The error analysis algorithm further causes the memory controller to apply an erasure mode of the error correction code algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removes entries in the page deallocation table that correspond to data corruption addressed by application of the erasure mode.
摘要:
Various embodiments of a system and method that clears information in a stalled output queue of a crossbar are disclosed. Briefly described, one embodiment is a method comprising communicating a piece of information into an exit queue residing in the output queue, monitoring a time that the piece of information resides in the exit queue, and clearing of the piece of information from the exit queue when the monitored time exceeds a predefined time.
摘要:
A computing device having partitions, and a method of communicating between partitions, are disclosed wherein each partition comprises at least one address area readable but not writable from the other of the at least two partitions. In one embodiment one partition sends to the other partition a request for information, which information is in the other partition in an address area not accessible to the one partition, the other partition copies the information to an address area accessible to the one partition, and the one partition reads the information from the accessible address area. In another embodiment the at least one accessible address area of each partition includes a data area and a consumer pointer indicating the position to which that partition has read the data area in another partition.
摘要:
An embodiment of the invention provides a method for migrating data from one location to another comprising establishing a new memory location under control of a specific memory accessing device. The new memory location being where data, which is being migrated from a first memory location, is to be resident, the specific accessing device taking control of a certain portion of data resident at the first memory location, the control preventing the certain data from being accessed by any device other than the specific accessing device, obtaining, under control of the specific accessing device, a most recent version of the certain data from the first memory location, forwarding the obtained certain data to the new memory location, and when the obtained certain data is forwarded to the new memory location, marking the certain data as being gone from the first memory location such that attempts to access the certain data at the first memory location from a specific accessing device will be redirected back to the accessing device for redirection to the new memory location.
摘要:
A method for connecting adjacent computing board devices. A source computing board may be provided. An optical engine attaches to the source computing board. A plurality of source optical connectors couples to the optical engine. A first optical connector may be positioned at a location on the source computing board for a first preset type of computing component on an adjacent computing board. A second optical connector may be positioned at a fixed coordinate related to the first optical connector on the source computing board.
摘要:
Various embodiments of the present invention are directed to arrangements of multiple optical buses to create scalable optical interconnect fabrics for computer systems. In one aspect, a multi-bus fabric (102) for transmitting optical signals between a plurality of nodes (108-111) comprises a plurality of optical buses (104-107). Each optical bus is optically coupled to each node of the plurality of nodes, and each optical bus is configured to so that one node broadcasts optical signals generated by the node to the other nodes of the plurality of nodes.