System and method for cooling an electronic component
    1.
    发明授权
    System and method for cooling an electronic component 有权
    用于冷却电子部件的系统和方法

    公开(公告)号:US07551440B2

    公开(公告)日:2009-06-23

    申请号:US11657145

    申请日:2007-01-24

    IPC分类号: H05K7/20

    CPC分类号: H05K7/20254 G06F1/20

    摘要: A cooling system has at least one heat conducting element in thermal contact with an electronic component. A heat exchanger is in fluid communication with the heat conducting element. The heat exchanger is configured to provide a working fluid to the at least one heat conducting element to facilitate dissipation of heat from the respective electronic component. The heat exchanger has a form factor dimensioned and configured for mounting in a preconfigured hardware unit slot of a computer chassis.

    摘要翻译: 冷却系统具有与电子部件热接触的至少一个导热元件。 热交换器与导热元件流体连通。 热交换器被配置为向至少一个导热元件提供工作流体以便于散发来自相应电子部件的热量。 热交换器具有尺寸和配置用于安装在计算机机箱的预配置的硬件单元插槽中的形状因子。

    System and method for cooling an electronic component
    2.
    发明申请
    System and method for cooling an electronic component 有权
    用于冷却电子部件的系统和方法

    公开(公告)号:US20080174962A1

    公开(公告)日:2008-07-24

    申请号:US11657145

    申请日:2007-01-24

    IPC分类号: H05K7/20

    CPC分类号: H05K7/20254 G06F1/20

    摘要: A cooling system has at least one heat conducting element in thermal contact with an electronic component. A heat exchanger is in fluid communication with the heat conducting element. The heat exchanger is configured to provide a working fluid to the at least one heat conducting element to facilitate dissipation of heat from the respective electronic component. The heat exchanger has a form factor dimensioned and configured for mounting in a preconfigured hardware unit slot of a computer chassis.

    摘要翻译: 冷却系统具有与电子部件热接触的至少一个导热元件。 热交换器与导热元件流体连通。 热交换器被配置为向至少一个导热元件提供工作流体以便于散发来自相应电子部件的热量。 热交换器具有尺寸和配置用于安装在计算机机箱的预配置的硬件单元插槽中的形状因子。

    SYSTEM AND METHOD FOR ACHIEVING CACHE COHERENCY WITHIN MULTIPROCESSOR COMPUTER SYSTEM
    4.
    发明申请
    SYSTEM AND METHOD FOR ACHIEVING CACHE COHERENCY WITHIN MULTIPROCESSOR COMPUTER SYSTEM 有权
    在多处理器计算机系统中实现高速缓存的系统和方法

    公开(公告)号:US20090094418A1

    公开(公告)日:2009-04-09

    申请号:US12244700

    申请日:2008-10-02

    IPC分类号: G06F12/08

    摘要: An embodiment of a multiprocessor computer system comprises main memory, a remote processor capable of accessing the main memory, a remote cache device operative to store accesses by said remote processor to said main memory, and a filter tag cache device associated with the main memory. The filter cache device is operative to store information relating to remote ownership of data in the main memory including ownership by the remote processor. The filter cache device is operative to selectively invalidate filter tag cache entries when space is required in the filter tag cache device for new cache entries. The remote cache device is responsive to events indicating that a cache entry has low value to the remote processor to send a hint to the filter tag cache device. The filter tag cache device is responsive to a hint in selecting a filter tag cache entry to invalidate.

    摘要翻译: 多处理器计算机系统的实施例包括主存储器,能够访问主存储器的远程处理器,可操作以存储所述远程处理器对所述主存储器的访问的远程高速缓存设备以及与主存储器相关联的过滤器标签高速缓存设备。 过滤器高速缓存设备用于存储与主存储器中的数据的远程所有权有关的信息,包括远程处理器的所有权。 过滤器高速缓存设备可操作以在过滤器标签高速缓存设备中为新的高速缓存条目需要空间时,选择性地使过滤器标签高速缓存条目无效。 远程高速缓存设备响应于指示高速缓存条目对于远程处理器具有低值以向该过滤器标签高速缓存设备发送提示的事件。 过滤器标签缓存设备响应于选择过滤器标签高速缓存条目以使其无效的提示。

    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table
    5.
    发明授权
    System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table 有权
    用于应用纠错码(ECC)擦除模式的系统和方法,并从页面解除分配表中清除记录的信息

    公开(公告)号:US07313749B2

    公开(公告)日:2007-12-25

    申请号:US10879643

    申请日:2004-06-29

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1064

    摘要: A system utilizing an erasure mode in an error correction code algorithm is described that includes non-volatile memory storing a page deallocation table. A memory controller stores and retrieves data from a memory subsystem, and uses an error correction code algorithm to correct data corruption in retrieved data. An error analysis algorithm executed in a processor records instances of data corruption in the page deallocation tables and deallocates memory regions associated with multiple occurrences of data corruption at single bit locations. The error analysis algorithm further causes the memory controller to apply an erasure mode of the error correction code algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removes entries in the page deallocation table that correspond to data corruption addressed by application of the erasure mode.

    摘要翻译: 描述了在纠错码算法中利用擦除模式的系统,其包括存储页面解除分配表的非易失性存储器。 存储器控制器从存储器子系统存储和检索数据,并使用纠错码算法来校正检索数据中的数据损坏。 在处理器中执行的错误分析算法记录页面解除分配表中的数据损坏的实例,并释放与单个位位置上的多次数据损坏相关联的存储器区域。 错误分析算法进一步导致存储器控制器在检测到存储器子系统的不同地址上的重复数据损坏模式时应用纠错码算法的擦除模式,并且去除页面分配表中对应于数据损坏的条目 通过应用擦除模式来解决。

    System and method for clearing information in a stalled output queue of a crossbar
    6.
    发明申请
    System and method for clearing information in a stalled output queue of a crossbar 审中-公开
    用于清除交叉开关的停止输出队列中的信息的系统和方法

    公开(公告)号:US20070248111A1

    公开(公告)日:2007-10-25

    申请号:US11409649

    申请日:2006-04-24

    IPC分类号: H04L12/56

    摘要: Various embodiments of a system and method that clears information in a stalled output queue of a crossbar are disclosed. Briefly described, one embodiment is a method comprising communicating a piece of information into an exit queue residing in the output queue, monitoring a time that the piece of information resides in the exit queue, and clearing of the piece of information from the exit queue when the monitored time exceeds a predefined time.

    摘要翻译: 公开了清除交叉开关的停止输出队列中的信息的系统和方法的各种实施例。 简要描述,一个实施例是一种方法,包括将一条信息传送到驻留在输出队列中的出口队列,监视该信息段驻留在出口队列中的时间,以及从出口队列清除该条信息, 监视时间超过预定时间。

    Communication among partitioned devices
    7.
    发明申请
    Communication among partitioned devices 有权
    分区设备之间的通信

    公开(公告)号:US20060026443A1

    公开(公告)日:2006-02-02

    申请号:US10902362

    申请日:2004-07-29

    IPC分类号: G06F12/14

    CPC分类号: G06F12/0284 G06F12/1441

    摘要: A computing device having partitions, and a method of communicating between partitions, are disclosed wherein each partition comprises at least one address area readable but not writable from the other of the at least two partitions. In one embodiment one partition sends to the other partition a request for information, which information is in the other partition in an address area not accessible to the one partition, the other partition copies the information to an address area accessible to the one partition, and the one partition reads the information from the accessible address area. In another embodiment the at least one accessible address area of each partition includes a data area and a consumer pointer indicating the position to which that partition has read the data area in another partition.

    摘要翻译: 公开了一种具有分区的计算设备和分区之间的通信方法,其中每个分区包括至少一个地址区域,所述至少一个地址区域可从该至少两个分区中的另一个分区读取但不能写入。 在一个实施例中,一个分区向另一个分区发送对信息的请求,哪个信息在一个分区不可访问的地址区域中的另一个分区中,另一个分区将该信息复制到该分区可访问的地址区域,以及 一个分区从可访问的地址区域读取信息。 在另一个实施例中,每个分区的至少一个可访问地址区域包括指示该分区已经读取另一个分区中的数据区域的位置的数据区和消费者指针。

    System and method for migrating data between memories

    公开(公告)号:US20050259481A1

    公开(公告)日:2005-11-24

    申请号:US11193215

    申请日:2005-07-29

    申请人: Mark Shaw Gary Gostin

    发明人: Mark Shaw Gary Gostin

    IPC分类号: G06F12/06 G06F12/08 G11C5/00

    CPC分类号: G06F12/08

    摘要: An embodiment of the invention provides a method for migrating data from one location to another comprising establishing a new memory location under control of a specific memory accessing device. The new memory location being where data, which is being migrated from a first memory location, is to be resident, the specific accessing device taking control of a certain portion of data resident at the first memory location, the control preventing the certain data from being accessed by any device other than the specific accessing device, obtaining, under control of the specific accessing device, a most recent version of the certain data from the first memory location, forwarding the obtained certain data to the new memory location, and when the obtained certain data is forwarded to the new memory location, marking the certain data as being gone from the first memory location such that attempts to access the certain data at the first memory location from a specific accessing device will be redirected back to the accessing device for redirection to the new memory location.

    BUS-BASED SCALABLE OPTICAL FABRICS
    10.
    发明申请
    BUS-BASED SCALABLE OPTICAL FABRICS 有权
    基于总线的可扩展光学织物

    公开(公告)号:US20120020663A1

    公开(公告)日:2012-01-26

    申请号:US13258425

    申请日:2009-05-06

    IPC分类号: H04B10/20 H04J14/02

    摘要: Various embodiments of the present invention are directed to arrangements of multiple optical buses to create scalable optical interconnect fabrics for computer systems. In one aspect, a multi-bus fabric (102) for transmitting optical signals between a plurality of nodes (108-111) comprises a plurality of optical buses (104-107). Each optical bus is optically coupled to each node of the plurality of nodes, and each optical bus is configured to so that one node broadcasts optical signals generated by the node to the other nodes of the plurality of nodes.

    摘要翻译: 本发明的各种实施例涉及多个光学总线的布置,以便为计算机系统创建可伸缩的光学互连结构。 一方面,用于在多个节点(108-111)之间传输光信号的多总线结构(102)包括多条光总线(104-107)。 每个光总线被光耦合到多个节点中的每个节点,并且每个光总线被配置为使得一个节点将节点生成的光信号广播到多个节点中的其他节点。