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公开(公告)号：US20090085163A1
公开(公告)日：2009-04-02
申请号：US11862964
申请日：2007-09-27
IPC分类号： H01L29/861 , H01L21/329
CPC分类号： H01L29/861 , H01L29/6609 , H01L29/66356 , H01L29/7391
摘要： Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.
摘要翻译： 一些实施例涉及在半导体本体和设置在半导体本体的掺杂区域上的外延膜之间出现垂直二极管活性的装置。 一些实施例包括引起垂直和横向二极管活动的装置。 一些实施例包括用于翅片半导体装置的门控垂直二极管。 工艺实施例包括形成垂直二极管装置。
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公开(公告)号：US08318553B2
公开(公告)日：2012-11-27
申请号：US12986875
申请日：2011-01-07
IPC分类号： H01L21/36 , H01L21/329
CPC分类号： H01L29/861 , H01L29/6609 , H01L29/66356 , H01L29/7391
摘要： Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.
摘要翻译： 一些实施例涉及在半导体本体和设置在半导体本体的掺杂区域上的外延膜之间出现垂直二极管活性的装置。 一些实施例包括引起垂直和横向二极管活动的装置。 一些实施例包括用于翅片半导体装置的门控垂直二极管。 工艺实施例包括形成垂直二极管装置。
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公开(公告)号：US08310027B2
公开(公告)日：2012-11-13
申请号：US12138319
申请日：2008-06-12
IPC分类号： H01L29/73
CPC分类号： H01L29/7317 , H01L21/8228 , H01L21/823814 , H01L21/823821 , H01L21/8249 , H01L27/0623 , H01L27/082 , H01L27/092 , H01L29/66265 , H01L29/74 , H01L29/785
摘要： Embodiments relate to a bipolar transistor that includes a body region having a fin structure. At least one terminal region may be formed over at least a portion of the body region. The at least one terminal region may be formed as an epitaxially grown region. Embodiments also relate to a vertically integrated electronic device that includes a first terminal region, a second terminal region and a third terminal region. The second terminal region may be arranged over at least a portion of the third terminal region, and at least two of the first, second and third terminal regions may be formed as epitaxially grown regions.
摘要翻译： 实施例涉及一种双极晶体管，其包括具有翅片结构的主体区域。 可以在身体区域的至少一部分上形成至少一个末端区域。 至少一个末端区域可以形成为外延生长区域。 实施例还涉及一种垂直集成的电子设备，其包括第一端子区域，第二端子区域和第三端子区域。 第二端子区域可以布置在第三端子区域的至少一部分上，并且第一，第二和第三端子区域中的至少两个可以形成为外延生长区域。
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公开(公告)号：US20110095347A1
公开(公告)日：2011-04-28
申请号：US12986875
申请日：2011-01-07
CPC分类号： H01L29/861 , H01L29/6609 , H01L29/66356 , H01L29/7391
摘要： Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.
摘要翻译： 一些实施例涉及在半导体本体和设置在半导体本体的掺杂区域上的外延膜之间出现垂直二极管活性的装置。 一些实施例包括引起垂直和横向二极管活动的装置。 一些实施例包括用于翅片半导体装置的门控垂直二极管。 工艺实施例包括形成垂直二极管装置。
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公开(公告)号：US20130009215A1
公开(公告)日：2013-01-10
申请号：US13618738
申请日：2012-09-14
IPC分类号： H01L29/808 , H01L21/337
CPC分类号： H01L29/861 , H01L29/6609 , H01L29/66356 , H01L29/7391
摘要： Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.
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公开(公告)号：US07888775B2
公开(公告)日：2011-02-15
申请号：US11862964
申请日：2007-09-27
IPC分类号： H01L27/08
CPC分类号： H01L29/861 , H01L29/6609 , H01L29/66356 , H01L29/7391
摘要： Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.
摘要翻译： 一些实施例涉及在半导体本体和设置在半导体本体的掺杂区域上的外延膜之间出现垂直二极管活性的装置。 一些实施例包括引起垂直和横向二极管活动的装置。 一些实施例包括用于翅片半导体装置的门控垂直二极管。 工艺实施例包括形成垂直二极管装置。
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公开(公告)号：US20090309167A1
公开(公告)日：2009-12-17
申请号：US12138319
申请日：2008-06-12
IPC分类号： H01L27/06 , H01L29/73 , H01L21/331 , H01L21/8249
CPC分类号： H01L29/7317 , H01L21/8228 , H01L21/823814 , H01L21/823821 , H01L21/8249 , H01L27/0623 , H01L27/082 , H01L27/092 , H01L29/66265 , H01L29/74 , H01L29/785
摘要： Embodiments relate to a bipolar transistor that includes a body region having a fin structure. At least one terminal region may be formed over at least a portion of the body region. The at least one terminal region may be formed as an epitaxially grown region. Embodiments also relate to a vertically integrated electronic device that includes a first terminal region, a second terminal region and a third terminal region. The second terminal region may be arranged over at least a portion of the third terminal region, and at least two of the first, second and third terminal regions may be formed as epitaxially grown regions.
摘要翻译： 实施例涉及一种双极晶体管，其包括具有翅片结构的主体区域。 可以在身体区域的至少一部分上形成至少一个末端区域。 至少一个末端区域可以形成为外延生长区域。 实施例还涉及一种垂直集成的电子设备，其包括第一端子区域，第二端子区域和第三端子区域。 第二端子区域可以布置在第三端子区域的至少一部分上，并且第一，第二和第三端子区域中的至少两个可以形成为外延生长区域。
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8.发明申请Multi-Fin Component Arrangement and Method for Manufacturing a Multi-Fin Component Arrangement 审中-公开多翅片组件布置和制造多鳍组件布置的方法公开(公告)号：US20080283925A1
公开(公告)日：2008-11-20
申请号：US12124369
申请日：2008-05-21
IPC分类号： H01L27/088 , H01L21/82
CPC分类号： H01L21/845 , H01L27/1211 , H01L29/785
摘要： In a first embodiment, a multi-fin component arrangement has a plurality of multi-fin component partial arrangements. Each of the multi-fin component partial arrangements has a plurality of electronic components, which electronic components have a multi-fin structure. At least one multi-fin component partial arrangement has at least one dummy structure, which at least one dummy structure is formed between at least two of the electronic components formed in the at least one multi-fin component partial arrangement. The dummy structure is formed in such a way that electrical characteristics of the electronic components formed in the multi-fin component partial arrangements are adapted to one another.
摘要翻译： 在第一实施例中，多翅片部件布置具有多个多翅片部件部分布置。 多片组件部分布置中的每一个具有多个电子部件，该电子部件具有多鳍结构。 至少一个多翅片部件部分布置具有至少一个虚拟结构，在形成于至少一个多翅片部件部分布置中的至少两个电子部件之间形成至少一个虚拟结构。 虚拟结构形成为使得形成在多翅片部件部分布置中的电子部件的电特性彼此适配。
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9.发明申请Integrated Circuit Arrangement Comprising a Field Effect Transistor, Especially a Tunnel Field Effect Transistor 有权包括场效应晶体管，特别是隧道场效应晶体管的集成电路布置公开(公告)号：US20090101975A1
公开(公告)日：2009-04-23
申请号：US11816822
申请日：2005-12-09
申请人： Juergen Holz , Ronald Kakoschke , Thomas Nirschl , Christian Pacha , Klaus Schruefer , Thomas Schulz , Doris Schmitt-Landsiedel
发明人： Juergen Holz , Ronald Kakoschke , Thomas Nirschl , Christian Pacha , Klaus Schruefer , Thomas Schulz , Doris Schmitt-Landsiedel
IPC分类号： H01L29/02
CPC分类号： H01L27/0886 , H01L21/823418 , H01L21/823462 , H01L27/1052 , H01L27/1203 , H01L29/66795 , H01L29/7391 , H01L29/7392 , H01L29/78 , H01L29/785 , H01L29/7854 , H01L29/7856
摘要： An explanation is given of, inter alia, tunnel field effect transistors having a thicker gate dielectric (GD1) in comparison with other transistors (T2) on the same integrated circuit arrangement (10). As an alternative or in addition, said tunnel field effect transistors have gate regions at mutually remote sides of a channel forming region or an interface between the connection regions (D1, S1) of the tunnel field effect transistor.
摘要翻译： 具体地说，具有与同一集成电路装置（10）上的其它晶体管（T2）相比具有较厚栅极电介质（GD1）的隧道场效应晶体管的解释。 作为替代或另外，所述隧道场效应晶体管具有在沟道形成区域的相对远侧的栅极区域或隧道场效应晶体管的连接区域（D1，S1）之间的界面。
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10.发明授权Integrated circuit arrangement comprising a field effect transistor, especially a tunnel field effect transistor 有权集成电路装置，其包括场效应晶体管，特别是隧道场效应晶体管公开(公告)号：US08629500B2
公开(公告)日：2014-01-14
申请号：US11816822
申请日：2005-12-09
申请人： Juergen Holz , Ronald Kakoschke , Thomas Nirschl , Christian Pacha , Klaus Schruefer , Thomas Schulz , Doris Schmitt-Landsiedel
发明人： Juergen Holz , Ronald Kakoschke , Thomas Nirschl , Christian Pacha , Klaus Schruefer , Thomas Schulz , Doris Schmitt-Landsiedel
IPC分类号： H01L29/06
CPC分类号： H01L27/0886 , H01L21/823418 , H01L21/823462 , H01L27/1052 , H01L27/1203 , H01L29/66795 , H01L29/7391 , H01L29/7392 , H01L29/78 , H01L29/785 , H01L29/7854 , H01L29/7856
摘要： An explanation is given of, inter alia, tunnel field effect transistors having a thicker gate dielectric (GD1) in comparison with other transistors (T2) on the same integrated circuit arrangement (10). As an alternative or in addition, said tunnel field effect transistors have gate regions at mutually remote sides of a channel forming region or an interface between the connection regions (D1, S1) of the tunnel field effect transistor.
摘要翻译： 具体地说，具有与同一集成电路装置（10）上的其它晶体管（T2）相比具有较厚栅极电介质（GD1）的隧道场效应晶体管的解释。 作为替代或另外，所述隧道场效应晶体管具有在沟道形成区域的相对远侧的栅极区域或隧道场效应晶体管的连接区域（D1，S1）之间的界面。
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