摘要:
A mixer may include a linearization circuit. The linearization circuit may include and operation amplifier, a first pass device, a second pass device, a first feedback resistor, and a second feedback resistor. Each of the first pass device and the second pass device may have a gate terminal, a first non-gate terminal, and a second non-gate terminal and coupled to its gate terminal to an output terminal of the operational amplifier and configured to be coupled at its first non-gate terminal to a high potential source. Each of the first feedback resistor and the second feedback resistor may have a first terminal and a second terminal, the first terminal coupled to the positive input terminal of the operational amplifier and the second terminal coupled to the second non-gate terminal of an associated pass device and the positive polarity of the differential baseband output.
摘要:
Apparatus for voltage regulation circuits and related operating methods are provided. An exemplary voltage regulation circuit includes a voltage regulation arrangement that provides a regulated output voltage based on an input voltage reference, a phase compensation arrangement coupled to the voltage regulation arrangement and configured to increase a phase margin of the voltage regulation arrangement, and detection circuitry coupled to the phase compensation arrangement. The detection circuitry is configured to disable the phase compensation arrangement in response to detecting an output current that is less than a threshold value.
摘要:
A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.
摘要:
Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要:
A direct conversion receiver (200) includes a low noise amplifier (LNA) (213), at least one baseband amplifier (119, 123 and 127), register banks (250 and 251) for storing a plurality of offset data corresponding to at least two LNA gain settings and a plurality of baseband gain settings, a DC offset correction system (235) for providing a DC offset signal, a state machine (275) for sequencing through each of the plurality of baseband gain settings and through enable and disable states for the LNA, and a processor (290) programmed to activate the state machine and to run the DC offset correction system.
摘要:
Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.
摘要:
In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.
摘要:
An amplifier, communication device and method of amplification are disclosed. An RF signal is amplified by a Doherty power amplifier (DPA). The DPA has a main amplifier with a Class-AB amplifier in parallel with a Class-C amplifier. When the RF signal power is smaller than 6 dB PBO, the Class-AB amplifier provides the main amplifier amplification; when the RF signal is between 6 dB PBO and 0 dB PBO, both the Class-AB and Class-C amplifiers provide the main amplifier amplification.
摘要:
A wireless communication device can include switch circuitry. The switch circuitry can include stacks having a common gate node and a common body node, wherein a stack includes a metal-oxide-semiconductor field-effect transistor (MOSFET) having a body resistive element coupled to a body terminal of the MOSFET and the common body node a gate resistive element coupled to a gate terminal of the MOSFET and the common gate node. The switch circuitry can further include a self-biased MOSFET coupled to the common gate node and the common body node, a gate of the self-biased MOSFET configured to receive direct current (DC) bias with a low pass filter.
摘要:
Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages.