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公开(公告)号：US07682945B2
公开(公告)日：2010-03-23
申请号：US12025333
申请日：2008-02-04
IPC分类号： H01L21/20
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1683 , Y10S438/90
摘要： The present invention in one embodiment provides a method of forming a memory device that includes providing an interlevel dielectric layer including a conductive stud having a first width; forming an stack comprising a metal layer and a first insulating layer; forming a second insulating layer atop portions of the interlevel dielectric layer adjacent each sidewall of the stack; removing the first insulating layer to provide a cavity; forming a conformal insulating layer atop the second insulating layer and the cavity; applying an anisotropic etch step to the conformal insulating layer to produce a opening having a second width exposing an upper surface of the metal layer, wherein the first width is greater than the second width; and forming a memory material layer in the opening.
摘要翻译： 本发明在一个实施例中提供了形成存储器件的方法，该存储器件包括提供包括具有第一宽度的导电柱的层间电介质层; 形成包括金属层和第一绝缘层的堆叠; 在层叠电介质层的与堆叠的每个侧壁相邻的部分上方形成第二绝缘层; 去除所述第一绝缘层以提供空腔; 在所述第二绝缘层和所述空腔的顶部形成保形绝缘层; 向保形绝缘层施加各向异性蚀刻步骤以产生具有暴露金属层的上表面的第二宽度的开口，其中第一宽度大于第二宽度; 并在开口中形成记忆材料层。
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公开(公告)号：US20090194757A1
公开(公告)日：2009-08-06
申请号：US12025333
申请日：2008-02-04
IPC分类号： H01L47/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1683 , Y10S438/90
摘要： The present invention in one embodiment provides a method of forming a memory device that includes providing an interlevel dielectric layer including a conductive stud having a first width; forming an stack comprising a metal layer and a first insulating layer; forming a second insulating layer atop portions of the interlevel dielectric layer adjacent each sidewall of the stack; removing the first insulating layer to provide a cavity; forming a conformal insulating layer atop the second insulating layer and the cavity; applying an anisotropic etch step to the conformal insulating layer to produce a opening having a second width exposing an upper surface of the metal layer, wherein the first width is greater than the second width; and forming a memory material layer in the opening.
摘要翻译： 本发明在一个实施例中提供了形成存储器件的方法，该存储器件包括提供包括具有第一宽度的导电柱的层间电介质层; 形成包括金属层和第一绝缘层的堆叠; 在层叠电介质层的与堆叠的每个侧壁相邻的部分上方形成第二绝缘层; 去除所述第一绝缘层以提供空腔; 在所述第二绝缘层和所述空腔的顶部形成保形绝缘层; 向保形绝缘层施加各向异性蚀刻步骤以产生具有暴露金属层的上表面的第二宽度的开口，其中第一宽度大于第二宽度; 并在开口中形成记忆材料层。
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公开(公告)号：US08633464B2
公开(公告)日：2014-01-21
申请号：US13350967
申请日：2012-01-16
IPC分类号： H01L45/00
CPC分类号： H01L45/143 , H01L27/2436 , H01L45/06 , H01L45/126 , H01L45/144 , H01L45/148 , H01L45/1683
摘要： A method for fabricating a phase change memory device including a plurality of in via phase change memory cells includes forming pillar heaters formed of a conductive material along a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters, forming an interlevel dielectric (ILD) layer above the dielectric layer, etching a via to the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via, recessing each pillar heater, depositing phase change material in each via on each recessed pillar heater, recessing the phase change material within each via, and forming a top electrode within the via on the phase change material.
摘要翻译： 一种用于制造包括多个通孔相变存储单元的相变存储器件的方法包括：形成由导电材料形成的支柱加热器，沿着与要连接到存取电路的导电触点阵列相对应的衬底的接触表面 沿着围绕柱加热器的衬底的暴露区域形成电介质层，在电介质层之上形成层间电介质（ILD）层，将通孔蚀刻到电介质层，每个通孔对应于每个立柱加热器，使得上表面 每个立柱加热器暴露在每个通孔内，使每个立柱加热器凹陷，在每个凹槽加热器上的每个通孔中沉积相变材料，使每个通孔内的相变材料凹陷，并且在相变材料上的通孔内形成顶部电极 。
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公开(公告)号：US07960203B2
公开(公告)日：2011-06-14
申请号：US12021577
申请日：2008-01-29
IPC分类号： H01L21/00
CPC分类号： H01L45/1625 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1666
摘要： A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
摘要翻译： 提供一种制造电极的方法，其包括在电介质层的导电结构的顶部设置第一相变材料的柱; 或倒置结构; 在电介质层的上方形成绝缘材料，并邻近所述柱，其中所述第一绝缘材料的上表面与所述柱的上表面共面; 将所述柱的上表面凹陷在所述绝缘材料的上表面下方以提供凹腔; 以及在所述凹腔和所述绝缘材料的上表面之上形成第二相变材料，其中所述第二相变材料具有比所述第一相变材料更大的相电阻率。
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5.发明申请公开(公告)号：US20110057162A1
公开(公告)日：2011-03-10
申请号：US12556198
申请日：2009-09-09
CPC分类号： H01L45/143 , H01L27/2436 , H01L45/06 , H01L45/126 , H01L45/144 , H01L45/148 , H01L45/1683
摘要： A method for fabricating a phase change memory device including a plurality of in via phase change memory cells includes forming pillar heaters formed of a conductive material along a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters, forming an interlevel dielectric (ILD) layer above the dielectric layer, etching a via to the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via, recessing each pillar heater, depositing phase change material in each via on each recessed pillar heater, recessing the phase change material within each via, and forming a top electrode within the via on the phase change material.
摘要翻译： 一种用于制造包括多个通孔相变存储单元的相变存储器件的方法包括：形成由导电材料形成的支柱加热器，沿着与要连接到存取电路的导电触点阵列相对应的衬底的接触表面 沿着围绕柱加热器的衬底的暴露区域形成电介质层，在电介质层之上形成层间电介质（ILD）层，将通孔蚀刻到电介质层，每个通孔对应于每个立柱加热器，使得上表面 每个立柱加热器暴露在每个通孔内，使每个立柱加热器凹陷，在每个凹槽加热器上的每个通孔中沉积相变材料，使每个通孔内的相变材料凹陷，并且在相变材料上的通孔内形成顶部电极 。
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公开(公告)号：US20130001500A1
公开(公告)日：2013-01-03
申请号：US13612552
申请日：2012-09-12
IPC分类号： H01L45/00
CPC分类号： H01L45/1625 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1666
摘要： A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
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公开(公告)号：US20110001111A1
公开(公告)日：2011-01-06
申请号：US12497596
申请日：2009-07-03
申请人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Blpin Rajendran , Alejandro G. Schrott , Yu Zhu
发明人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Blpin Rajendran , Alejandro G. Schrott , Yu Zhu
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/1675 , H01L45/1683
摘要： A memory cell structure and method for forming the same. The method includes forming a pore within a dielectric layer. The pore is formed over the center of an electrically conducting bottom electrode. The method includes depositing a thermally insulating layer along at least one sidewall of the pore. The thermally insulating layer isolates heat from phase change current to the volume of the pore. In one embodiment phase change material is deposited within the pore and the volume of the thermally insulating layer. In another embodiment a pore electrode is formed within the pore and the volume of the thermally insulating layer, with the phase change material being deposited above the pore electrode. The method also includes forming an electrically conducting top electrode above the phase change material.
摘要翻译： 一种存储单元结构及其形成方法。 该方法包括在电介质层内形成孔。 孔形成在导电底部电极的中心上方。 该方法包括沿孔的至少一个侧壁沉积绝热层。 绝热层将热量从相变电流隔离成孔的体积。 在一个实施例中，相变材料沉积在孔隙和隔热层的体积内。 在另一个实施方案中，孔隙电极形成在绝热层的孔隙和体积内，相变材料沉积在孔电极上方。 该方法还包括在相变材料上形成导电顶电极。
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公开(公告)号：US07851323B2
公开(公告)日：2010-12-14
申请号：US12500659
申请日：2009-07-10
申请人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Alejandro G. Schrott , Gerhard Ingmar Meijer
发明人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Alejandro G. Schrott , Gerhard Ingmar Meijer
CPC分类号： H01L45/141 , G11C13/0004 , G11C13/0007 , G11C2213/52 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/145
摘要： The present invention, in one embodiment, provides a memory device that includes a phase change memory cell; a first electrode; and a layer of filamentary resistor material positioned between the phase change memory cell and the first electrode, wherein at least one bistable conductive filamentary pathway is present in at least a portion of the layer of filamentary resistor material that provides electrical communication between the phase change memory cell and the first electrode.
摘要翻译： 本发明在一个实施例中提供了一种包括相变存储单元的存储器件; 第一电极; 以及位于所述相变存储器单元和所述第一电极之间的丝状电阻材料层，其中在所述丝状电阻器材料层的至少一部分中存在至少一个双稳态导电丝状通道，其提供所述相变存储器 电池和第一电极。
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公开(公告)号：US20090275168A1
公开(公告)日：2009-11-05
申请号：US12500659
申请日：2009-07-10
申请人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Alejandro G. Schrott , Gerhard Ingmar Meijer
发明人： Matthew J. Breitwisch , Roger W. Cheek , Eric A. Joseph , Chung H. Lam , Alejandro G. Schrott , Gerhard Ingmar Meijer
CPC分类号： H01L45/141 , G11C13/0004 , G11C13/0007 , G11C2213/52 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/145
摘要： The present invention, in one embodiment, provides a memory device that includes a phase change memory cell; a first electrode; and a layer of filamentary resistor material positioned between the phase change memory cell and the first electrode, wherein at least one bistable conductive filamentary pathway is present in at least a portion of the layer of filamentary resistor material that provides electrical communication between the phase change memory cell and the first electrode.
摘要翻译： 本发明在一个实施例中提供了一种包括相变存储单元的存储器件; 第一电极; 以及位于所述相变存储器单元和所述第一电极之间的丝状电阻材料层，其中在所述丝状电阻器材料层的至少一部分中存在至少一个双稳态导电丝状通道，其提供所述相变存储器 电池和第一电极。
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公开(公告)号：US08686391B2
公开(公告)日：2014-04-01
申请号：US13612552
申请日：2012-09-12
CPC分类号： H01L45/1625 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1616 , H01L45/165 , H01L45/1666
摘要： A method of manufacturing an electrode is provided that includes providing a pillar of a first phase change material atop a conductive structure of a dielectric layer; or the inverted structure; forming an insulating material atop dielectric layer and adjacent the pillar, wherein an upper surface of the first insulating material is coplanar with an upper surface of the pillar; recessing the upper surface of the pillar below the upper surface of the insulating material to provide a recessed cavity; and forming a second phase change material atop the recessed cavity and the upper surface of the insulating material, wherein the second phase change material has a greater phase resistivity than the first phase change material.
摘要翻译： 提供一种制造电极的方法，其包括在电介质层的导电结构的顶部设置第一相变材料的柱; 或倒置结构; 在电介质层的上方形成绝缘材料，并邻近所述柱，其中所述第一绝缘材料的上表面与所述柱的上表面共面; 将所述柱的上表面凹陷在所述绝缘材料的上表面下方以提供凹腔; 以及在所述凹腔和所述绝缘材料的上表面之上形成第二相变材料，其中所述第二相变材料具有比所述第一相变材料更大的相电阻率。
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