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公开(公告)号：US20240242990A1
公开(公告)日：2024-07-18
申请号：US18301291
申请日：2023-04-17
申请人： Ciena Corporation
IPC分类号： H01L21/673 , B25B11/00 , H01L21/683
CPC分类号： H01L21/67346 , B25B11/005 , H01L21/6838
摘要： An apparatus for securing a wafer, the wafer having a first side comprising a plurality of fabricated structure regions and a second side that has at least one region that is exposed for fabrication when the wafer is secured, comprises: a carrier base configured to receive the wafer, the carrier base comprising one or more alignment features for aligning the wafer to the carrier base; and a plurality of support structures arranged on the carrier base. Three or more of the support structures are each configured to contact the first side of the wafer when the wafer is secured to the carrier base, and arranged on the carrier base to contact the first side of the wafer at a location on the first side of the wafer that is between at least two of the plurality of fabricated structure regions.
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公开(公告)号：US20220187550A1
公开(公告)日：2022-06-16
申请号：US17122491
申请日：2020-12-15
申请人： Ciena Corporation
IPC分类号： G02B6/42
摘要： At least a portion of an integrated circuit wafer includes at least one layer in which two or more waveguides are formed. A cavity is formed in the integrated circuit wafer. At least one die, comprising a photonic integrated circuit, has: at least one edge on which there are two or more optical mode defining structures in proximity to respective optical mode defining structures on at least one surface of the cavity, a bottom surface secured to a bottom surface of the cavity, and a top surface on which there is at least one metal contact.
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公开(公告)号：US20220075117A1
公开(公告)日：2022-03-10
申请号：US17015549
申请日：2020-09-09
申请人： Ciena Corporation
摘要： A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.
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公开(公告)号：US11480745B2
公开(公告)日：2022-10-25
申请号：US17122491
申请日：2020-12-15
申请人： Ciena Corporation
IPC分类号： G02B6/42
摘要： At least a portion of an integrated circuit wafer includes at least one layer in which two or more waveguides are formed. A cavity is formed in the integrated circuit wafer. At least one die, comprising a photonic integrated circuit, has: at least one edge on which there are two or more optical mode defining structures in proximity to respective optical mode defining structures on at least one surface of the cavity, a bottom surface secured to a bottom surface of the cavity, and a top surface on which there is at least one metal contact.
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公开(公告)号：US12111497B2
公开(公告)日：2024-10-08
申请号：US18330414
申请日：2023-06-07
申请人： Ciena Corporation
CPC分类号： G02B6/13 , B25J15/0028 , B25J15/0616 , H01L24/83 , H01L2224/83121 , H01L2224/83855 , H01L2924/3511
摘要： A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.
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公开(公告)号：US11846806B2
公开(公告)日：2023-12-19
申请号：US17015549
申请日：2020-09-09
申请人： Ciena Corporation
CPC分类号： G02B6/13 , B25J15/0028 , B25J15/0616 , H01L24/83 , H01L2224/83121 , H01L2224/83855 , H01L2924/3511
摘要： A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.
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公开(公告)号：US20230163046A1
公开(公告)日：2023-05-25
申请号：US17535138
申请日：2021-11-24
申请人： Ciena Corporation
IPC分类号： H01L23/40 , H01L25/065
CPC分类号： H01L23/4012 , H01L25/0657 , H01L2023/4031
摘要： An apparatus including first and second substrates. The first and second substrates each include a base and at least one peripheral wall extending from the base. One of the at least one peripheral walls of the first or second substrates includes at least one well, and the other of the at least one peripheral walls of the first or the seconds substrate that does not include a well is mechanically anchored to the well. The apparatus includes a stack having a first and second end, and the stack is disposed on the base of the first and/or the second substrates at the first and/or second ends. The stack includes at least one element configured to generate energy.
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公开(公告)号：US20240345336A1
公开(公告)日：2024-10-17
申请号：US18325174
申请日：2023-05-30
申请人： Ciena Corporation
发明人： Raphael Beaupré-Laflamme , Nicolas Boyer , François Pelletier , Simon Savard , Veronique Jomphe Allain , Luc Bélanger
IPC分类号： G02B6/42
CPC分类号： G02B6/4212 , G02B6/4215 , G02B6/4279
摘要： An article of manufacture comprises: at least a portion of a wafer comprising a substate and one or more layers fabricated on the substrate; one or more integrated photonic structures in the portion of the wafer, where at least a first integrated photonic structure of the one or more integrated photonic structures is associated with an electromagnetic wave propagation region that extends beyond a first surface of a first layer of the one or more layers; an array of structures arranged in a two-dimensional pattern on a portion of the first surface; and an adhesive material making contact with the first surface and with at least a majority of the structures in the array of structures.
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公开(公告)号：US20240326252A1
公开(公告)日：2024-10-03
申请号：US18194674
申请日：2023-04-03
申请人： Ciena Corporation
CPC分类号： B25J9/1687 , B25J13/088 , B25J17/0225
摘要： In one aspect, in general, a method for placing a chip for device manufacturing comprises: picking up the chip with a component placement tool comprises a tool surface; spatially translating the component placement tool and the chip along a direction substantially perpendicular to a plane defined by a reference surface, the spatially translating comprising beginning the spatially translating at a first spatial coordinate with respect to the direction, and ending the spatially translating when contact between the reference surface and the tool surface is detected by a sensor at a second spatial coordinate with respect to the direction; and in response to detecting the contact, releasing the chip from the component placement tool and onto a portion of a device assembly in proximity to the second spatial coordinate with respect to the direction.
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公开(公告)号：US11942395B2
公开(公告)日：2024-03-26
申请号：US17535138
申请日：2021-11-24
申请人： Ciena Corporation
IPC分类号： H01L23/42 , H01L23/40 , H01L25/065
CPC分类号： H01L23/4012 , H01L25/0657 , H01L2023/4031
摘要： An apparatus including first and second substrates. The first and second substrates each include a base and at least one peripheral wall extending from the base. One of the at least one peripheral walls of the first or second substrates includes at least one well, and the other of the at least one peripheral walls of the first or the seconds substrate that does not include a well is mechanically anchored to the well. The apparatus includes a stack having a first and second end, and the stack is disposed on the base of the first and/or the second substrates at the first and/or second ends. The stack includes at least one element configured to generate energy. A method of assembling the apparatus by contacting the substrates.
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