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公开(公告)号：US20160344536A1
公开(公告)日：2016-11-24
申请号：US15159760
申请日：2016-05-19
Inventor： Bhoodev Kumar , Muraleedharan Ramakrishnan , Vivek Oppula , Thomas Hoff , Willem Zwart
IPC: H04L7/00
CPC classification number: H04L7/0008 , G06F13/40 , G06F13/4291 , Y02D10/14 , Y02D10/151
Abstract: Synchronous, differential signaling may be performed over a communications path through a wired connection between a master device and a slave device to provide high-bandwidth and/or low-latency communications. Flexibility may be provided in the signaling protocol by providing for a configurable frame structure. Flexibility may be provided in mapping of data streams to bit slots in a frame, varying a number of downlink and uplink slots, configuring a number of turnarounds and locations of the turnarounds within a frame, configuring location and number of control word bit (CWB) slots in a frame, and/or adjusting a clock frequency of the communications link.
Abstract translation: 可以通过主设备和从设备之间的有线连接在通信路径上执行同步差分信令，以提供高带宽和/或低延迟通信。 可以通过提供可配置的帧结构在信令协议中提供灵活性。 灵活性可以在数据流映射到帧中的位时隙，改变下行链路和上行链路时隙数量，配置多个周转时间以及帧内周转的位置，配置控制字位（CWB）的位置和数量的情况下， 时隙，和/或调整通信链路的时钟频率。
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公开(公告)号：US20250023573A1
公开(公告)日：2025-01-16
申请号：US18353094
申请日：2023-07-16
Inventor： Jianqi Chen , Jaiminkumar Mehta , Bhoodev Kumar , John L. Melanson
Abstract: Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.
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公开(公告)号：US11641558B2
公开(公告)日：2023-05-02
申请号：US17108433
申请日：2020-12-01
Inventor： Anindya Bhattacharya , Bhoodev Kumar , Jaimin Mehta , Yongsheng Shi , Aleksey S. Khenkin , John L. Melanson
IPC: H04R29/00
Abstract: A method and apparatus for detecting a microphone condition of a microphone, the method comprising: applying an electrical stimulus to a microphone; measuring an electrical response to the electrical stimulus at the microphone; comparing the electrical response to an expected response; and determining the microphone condition based on the comparison.
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公开(公告)号：US20250147713A1
公开(公告)日：2025-05-08
申请号：US18500224
申请日：2023-11-02
Inventor： Gaofeng Fan , Qi Cai , John B. Bowlerwell , Richard Turkson , Anindya Bhattacharya , Bhoodev Kumar
IPC: G06F3/16
Abstract: Circuit techniques reduce or prevent audible artifacts in a Universal Audio Jack (UAJ) interface circuit, improving handling of mis-configuration/mis-attachment of devices. The interface includes at least one terminal for accepting an audio input signal or providing an audio line output signal coupled to an input or output of a first audio circuit. The first audio circuit operates from a low voltage domain and receives the audio input signal or provides the audio line output signal. A second circuit operates from a higher voltage domain and a switching circuit couples the at least one terminal to the second circuit. The output is slew-rate controlled to control a transition time of the output, so that audible artifacts in the audio input signal or the audio line output signal that could be generated by the switching circuit connecting the second circuit to the at least one terminal are avoided.
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公开(公告)号：US20190037327A1
公开(公告)日：2019-01-31
申请号：US16046943
申请日：2018-07-26
Inventor： Anindya Bhattacharya , Bhoodev Kumar , John L. Melanson , Vivek Oppula , Anuradha Parsi , Qi Cai
Abstract: An apparatus for biasing a plurality of microphones includes a sensing circuit that actively senses a local ground reference for each microphone. An intermediate stage receives a constant non-local reference voltage as an input and responsively provides a respective constant local reference signal (e.g., current) with respect to each of the actively sensed local ground references. For each microphone, a respective microphone bias block uses the respective constant local reference signal to generate a respective constant local microphone bias voltage to bias the microphone. For each microphone, a variable RC network uses the respective constant local reference current to generate a constant local reference voltage for the microphone. Each RC network is controllable in response to the respective actively sensed local ground reference to independently set the respective local microphone bias voltage. A sensing circuit may actively sense the local microphone bias voltages to control local microphone bias voltage generation.
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Patent Agency Ranking
公开(公告)号：US20170310315A1
公开(公告)日：2017-10-26
申请号：US15485062
申请日：2017-04-11
Inventor： Muraleedharan Ramakrishnan , Bhoodev Kumar , Vivek Oppula , Niju Alex Geevarughese
IPC: H03K5/26
CPC classification number: H03K5/26
Abstract: A synchronous clock edge alignment system and method increases detection coverage of transition delay faults that occur in logic circuits that have data released by a clock at an input of logic circuits internal to an integrated circuit and/or released at the output of the logic circuits when testing an integrated circuit. To increase detection coverage of inter-clock transition delay faults, in at least one embodiment, the synchronous clock edge alignment system and method align same transition type edges of internal data releasing clock signals, and at least two of the clock signals have different frequencies. By aligning the edges of the clock signals, transition delay faults that might otherwise not have occurred can be detected by, for example, a conventional circuit testing apparatus. Thus, aligning the edges of the clock signals increases detection of inter-clock transition delay faults.
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公开(公告)号：US11082012B2
公开(公告)日：2021-08-03
申请号：US16409580
申请日：2019-05-10
Inventor： Vaibhav Pandey , Bhoodev Kumar
Abstract: An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.
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公开(公告)号：US10128828B2
公开(公告)日：2018-11-13
申请号：US15485062
申请日：2017-04-11
Inventor： Muraleedharan Ramakrishnan , Bhoodev Kumar , Vivek Oppula , Niju Alex Geevarughese
Abstract: A synchronous clock edge alignment system and method increases detection coverage of transition delay faults that occur in logic circuits that have data released by a clock at an input of logic circuits internal to an integrated circuit and/or released at the output of the logic circuits when testing an integrated circuit. To increase detection coverage of inter-clock transition delay faults, in at least one embodiment, the synchronous clock edge alignment system and method align same transition type edges of internal data releasing clock signals, and at least two of the clock signals have different frequencies. By aligning the edges of the clock signals, transition delay faults that might otherwise not have occurred can be detected by, for example, a conventional circuit testing apparatus. Thus, aligning the edges of the clock signals increases detection of inter-clock transition delay faults.
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公开(公告)号：US12261611B2
公开(公告)日：2025-03-25
申请号：US18353094
申请日：2023-07-16
Inventor： Jianqi Chen , Jaiminkumar Mehta , Bhoodev Kumar , John L. Melanson
Abstract: Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.
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公开(公告)号：US10674296B2
公开(公告)日：2020-06-02
申请号：US16046943
申请日：2018-07-26
Inventor： Anindya Battacharya , Bhoodev Kumar , John L. Melanson , Vivek Oppula , Anuradha Parsi , Qi Cai
Abstract: An apparatus for biasing a plurality of microphones includes a sensing circuit that actively senses a local ground reference for each microphone. An intermediate stage receives a constant non-local reference voltage as an input and responsively provides a respective constant local reference signal (e.g., current) with respect to each of the actively sensed local ground references. For each microphone, a respective microphone bias block uses the respective constant local reference signal to generate a respective constant local microphone bias voltage to bias the microphone. For each microphone, a variable RC network uses the respective constant local reference current to generate a constant local reference voltage for the microphone. Each RC network is controllable in response to the respective actively sensed local ground reference to independently set the respective local microphone bias voltage. A sensing circuit may actively sense the local microphone bias voltages to control local microphone bias voltage generation.
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