Early header CRC in data response packets with variable gap count
    3.
    发明申请
    Early header CRC in data response packets with variable gap count 审中-公开
    数据响应报文中的早期报头CRC可变间隙计数

    公开(公告)号:US20090271532A1

    公开(公告)日:2009-10-29

    申请号:US12108744

    申请日:2008-04-24

    IPC分类号: G06F13/14

    CPC分类号: G06F11/1004

    摘要: A method is provided for processing a command issued by a processor over a bus. The method includes (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet including the header and the header CRC; (4) loading a timer to run until data required to complete the command is received or the timer expires; and (5) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.

    摘要翻译: 提供了一种用于处理由总线发出的处理器的命令的方法。 该方法包括(1)将命令发送到远程节点以获得完成命令所需的数据; (2)从远程节点接收包括报头和报头CRC的响应分组; (3)验证包括报头和报头CRC的响应报文; (4)加载定时器运行,直到接收完成命令所需的数据或定时器到期; 和(5)在接收完成命令所需的数据之前,安排通过总线将数据返回给处理器。

    Early header CRC in data response packets with variable gap count
    4.
    发明申请
    Early header CRC in data response packets with variable gap count 审中-公开
    数据响应报文中的早期报头CRC可变间隙计数

    公开(公告)号:US20090268736A1

    公开(公告)日:2009-10-29

    申请号:US12108637

    申请日:2008-04-24

    IPC分类号: H04L12/56

    摘要: A method is provided for processing commands issued by a processor over a bus. The method includes the steps of (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet based on the header CRC; and (4) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.

    摘要翻译: 提供了一种处理由总线发出的命令的方法。 该方法包括以下步骤:(1)将命令发送到远程节点以获得对完成命令所需的数据的访问; (2)从远程节点接收包括报头和报头CRC的响应分组; (3)基于报头CRC验证响应分组; 和(4)在接收完成命令所需的数据之前,安排通过总线将数据返回到处理器。