Cochlear implant power system and methodology
    1.
    发明授权
    Cochlear implant power system and methodology 有权
    人工耳蜗电力系统和方法学

    公开(公告)号:US08280522B2

    公开(公告)日:2012-10-02

    申请号:US11761475

    申请日:2007-06-12

    IPC分类号: A61N1/08 A61N1/18

    摘要: A cochlear implant system has an implantable portion that includes a stimulator module for producing for the auditory system of a user an electrical stimulation signal representative of an acoustic signal. The implantable portion further includes a battery for supplying power to the stimulator module, a receiver module for receiving an electrical power signal across the skin of a user, and a recharge module that uses the electrical power signal to recharge the battery. The recharge module recharges the battery at less than the maximum recharge rate.

    摘要翻译: 耳蜗植入系统具有可植入部分,其包括刺激器模块,用于为用户的听觉系统产生表示声学信号的电刺激信号。 可植入部分还包括用于向刺激器模块供电的电池,用于接收穿过用户皮肤的电功率信号的接收器模块以及使用电功率信号对电池再充电的再充电模块。 充电模块以小于最大充电速率对电池充电。

    Partially inserted cochlear implant
    2.
    发明授权
    Partially inserted cochlear implant 有权
    部分插入人工耳蜗

    公开(公告)号:US06556870B2

    公开(公告)日:2003-04-29

    申请号:US09774391

    申请日:2001-01-31

    IPC分类号: A61N108

    摘要: A cochlear implant system has a signal processor that fits in the ear canal of a user. The signal processor processes an acoustic signal present in the ear of the user to produce a representative radio signal. A power transmitter transmits an electrical power signal through the skin of the user. A cochlear implant receives the radio signal and the electrical power signal and produces for the auditory nerve of the user an electrical stimulation signal representative of the acoustic signal.

    摘要翻译: 耳蜗植入系统具有适合用户耳道的信号处理器。 信号处理器处理存在于用户耳朵中的声信号以产生代表性的无线电信号。 电力发射器通过用户的皮肤发送电力信号。 耳蜗植入物接收无线电信号和电功率信号,并为用户的听觉神经产生表示声信号的电刺激信号。

    Cochlear Implant Power System and Methodology
    3.
    发明申请
    Cochlear Implant Power System and Methodology 有权
    人工耳蜗电力系统与方法学

    公开(公告)号:US20120316618A1

    公开(公告)日:2012-12-13

    申请号:US13589548

    申请日:2012-08-20

    IPC分类号: A61F11/04 A61N1/36 A61N1/05

    摘要: A cochlear implant system has an implantable portion that includes a stimulator module for producing for the auditory system of a user an electrical stimulation signal representative of an acoustic signal. The implantable portion further includes a battery for supplying power to the stimulator module, a receiver module for receiving an electrical power signal across the skin of a user, and a recharge module that uses the electrical power signal to recharge the battery. The recharge module recharges the battery at less than the maximum recharge rate.

    摘要翻译: 耳蜗植入系统具有可植入部分,其包括刺激器模块,用于为用户的听觉系统产生表示声学信号的电刺激信号。 可植入部分还包括用于向刺激器模块供电的电池,用于接收穿过用户皮肤的电功率信号的接收器模块以及使用电功率信号对电池再充电的再充电模块。 充电模块以小于最大充电速率对电池充电。

    Cochlear implant power system and methodology
    4.
    发明授权
    Cochlear implant power system and methodology 有权
    人工耳蜗电力系统和方法学

    公开(公告)号:US08938304B2

    公开(公告)日:2015-01-20

    申请号:US13589548

    申请日:2012-08-20

    IPC分类号: A61N1/378 A61N1/36 A61N1/372

    摘要: A cochlear implant system has an implantable portion that includes a stimulator module for producing for the auditory system of a user an electrical stimulation signal representative of an acoustic signal. The implantable portion further includes a battery for supplying power to the stimulator module, a receiver module for receiving an electrical power signal across the skin of a user, and a recharge module that uses the electrical power signal to recharge the battery. The recharge module recharges the battery at less than the maximum recharge rate.

    摘要翻译: 耳蜗植入系统具有可植入部分,其包括刺激器模块,用于为用户的听觉系统产生表示声学信号的电刺激信号。 可植入部分还包括用于向刺激器模块供电的电池,用于接收穿过用户皮肤的电功率信号的接收器模块以及使用电功率信号对电池再充电的再充电模块。 充电模块以小于最大充电速率对电池充电。

    Electrical nerve stimulation based on channel specific sampling sequences
    5.
    发明授权
    Electrical nerve stimulation based on channel specific sampling sequences 有权
    基于通道特异性采样序列的电神经刺激

    公开(公告)号:US08798758B2

    公开(公告)日:2014-08-05

    申请号:US13070880

    申请日:2011-03-24

    IPC分类号: A61N1/36 A61N1/05

    摘要: A method of activating at least two electrodes in a multichannel electrode array using channel specific sampling sequences is presented. A channel specific sampling sequence is defined for each electrode, the sequence having a particular duration, pulse amplitude distribution, and number of pulses. A weighting factor is applied to the channel specific sampling sequence. Each electrode in the multichannel electrode array is then simultaneously activated using sign-correlated pulses, the sign-correlated pulses based on parameters of spatial channel interaction reflecting geometric overlapping of electrical fields from each electrode, non-linear compression, and each electrode's weighted channel specific sampling sequence.

    摘要翻译: 提出了使用信道特定采样序列激活多通道电极阵列中的至少两个电极的方法。 为每个电极定义通道特定采样序列,该序列具有特定的持续时间,脉冲幅度分布和脉冲数。 加权因子被应用于信道特定采样序列。 然后使用符号相关脉冲同时激活多通道电极阵列中的每个电极,基于空间通道相互作用的参数的符号相关脉冲反映来自每个电极的电场的几何重叠,非线性压缩和每个电极的加权通道特定 采样序列。

    System for High Efficiency Vibratory Acoustic Stimulation
    6.
    发明申请
    System for High Efficiency Vibratory Acoustic Stimulation 审中-公开
    高效振动声学刺激系统

    公开(公告)号:US20120328131A1

    公开(公告)日:2012-12-27

    申请号:US13166261

    申请日:2011-06-22

    IPC分类号: H04R1/00

    CPC分类号: H04R25/606 H04R1/00 H04R3/00

    摘要: A system and method of driving a floating mass transducer with an analog input signal uIN(t), uIN(t) being between ground and VCC, is provided. The method includes converting uIN(t) to a binary rectangular signal uR(t) with two levels VCC and GND. A switching network is driven with uR(t) so as to switch nodes N1 and N2 between VCC and ground. The floating mass transducer is coupled between nodes N1 and N2 to a capacitor C in parallel, and further to a coil L in series.

    摘要翻译: 提供了具有模拟输入信号uIN(t),uIN(t)在地和VCC之间的浮动质量传感器的驱动系统和方法。 该方法包括将uIN(t)转换为具有两个电平VCC和GND的二进制矩形信号uR(t)。 开关网络由uR(t)驱动,以便在VCC和地之间切换节点N1和N2。 浮动质量传感器在节点N1和N2之间并联耦合到电容器C,并且进一步耦合到串联的线圈L.

    Simultaneous stimulation for low power consumption
    7.
    发明授权
    Simultaneous stimulation for low power consumption 有权
    同时刺激低功耗

    公开(公告)号:US07917224B2

    公开(公告)日:2011-03-29

    申请号:US11101149

    申请日:2005-04-07

    IPC分类号: A61N1/08

    CPC分类号: H04R25/505 A61N1/36036

    摘要: A stimulation system including a stimulator having a multi-channel electrode array utilizing a monopolar electrode configuration. A processor is operatively coupled to the stimulator. The processor is configured to determine a channel interaction (CI) sequence using simultaneous, sign-correlated pulses and channel interaction compensation. The CI sequence has a CI pulse rate and a CI mean pulse amplitude, and produces resulting potentials that are substantially equal to desired potentials at given positions relative to the multi-channel array. The CI sequence may include temporal gaps between pulses, wherein the processor may be configured to increase the CI pulse rate, such that the temporal gap between pulses is decreased. Furthermore, the processor may be configured to reduce the pulse amplitude of the CI sequence while increasing pulse phase duration, such that charge per pulse remains substantially unchanged and the temporal gap between pulses is decreased.

    摘要翻译: 一种刺激系统,包括具有利用单极电极构造的多通道电极阵列的刺激器。 处理器可操作地耦合到刺激器。 处理器被配置为使用同时的符号相关脉冲和信道交互补偿来确定信道交互(CI)序列。 CI序列具有CI脉冲速率和CI平均脉冲幅度,并且产生基本上等于相对于多通道阵列的给定位置处的期望电位的所得电位。 CI序列可以包括脉冲之间的时间间隙,其中处理器可以被配置为增加CI脉冲速率,使得脉冲之间的时间间隔减小。 此外,处理器可以被配置为在增加脉冲相位持续时间的同时减小CI序列的脉冲幅度,使得每脉冲的电荷基本上保持不变,并且脉冲之间的时间间隔减小。

    Adaptive sigma-delta modulation
    8.
    发明授权
    Adaptive sigma-delta modulation 有权
    自适应Σ-Δ调制

    公开(公告)号:US06885327B2

    公开(公告)日:2005-04-26

    申请号:US10827584

    申请日:2004-04-19

    IPC分类号: H03M3/02 H03M3/00

    CPC分类号: H03M3/49 H03M3/48

    摘要: An adaptive sigma delta modulator has an input stage, a conventional sigma delta modulator, and adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal and an adaptive signal, the amplitude of the analog input signal being in a first range [−a+a]. The conventional sigma delta modulator produces an intermediate digital output sequence representative of the difference signal, the amplitude of the intermediate digital output sequence being in a second range [−b+b], wherein b

    摘要翻译: 自适应Σ-Δ调制器具有输入级,常规Σ-Δ调制器和适配级以及输出级。 输入级产生表示模拟输入信号和自适应信号之间的差的差信号,模拟输入信号的幅度处于第一范围[-a + a]。 常规的Σ-Δ调制器产生代表差分信号的中间数字输出序列,中间数字输出序列的幅度在第二范围[-b + b],其中b

    Adaptive &Sgr;&Dgr; modulation with one-bit quantization
    9.
    发明授权
    Adaptive &Sgr;&Dgr; modulation with one-bit quantization 有权
    具有一位量化的自适应SigmaDelta调制

    公开(公告)号:US06727833B2

    公开(公告)日:2004-04-27

    申请号:US10357613

    申请日:2003-02-04

    IPC分类号: H03M300

    CPC分类号: H03M3/49 H03M3/48

    摘要: An adaptive sigma delta modulator has an input stage, a conventional sigma delta modulator, and adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal and an adaptive signal, the amplitude of the analog input signal being in a first range [−a+a]. The conventional sigma delta modulator produces an intermediate digital output sequence representative of the difference signal, the amplitude of the intermediate digital output sequence being in a second range [−b+b], wherein b

    摘要翻译: 自适应Σ-Δ调制器具有输入级,常规Σ-Δ调制器和适配级以及输出级。 输入级产生表示模拟输入信号和自适应信号之间的差的差信号,模拟输入信号的幅度处于第一范围[-a + a]。 常规的Σ-Δ调制器产生代表差分信号的中间数字输出序列,中间数字输出序列的幅度在第二范围[-b + b],其中b

    Data and Power System Based on CMOS Bridge
    10.
    发明申请
    Data and Power System Based on CMOS Bridge 有权
    基于CMOS桥的数据和电源系统

    公开(公告)号:US20120307539A1

    公开(公告)日:2012-12-06

    申请号:US13551817

    申请日:2012-07-18

    IPC分类号: H02M7/217

    摘要: A signal processing circuit is provided that includes a CMOS bridge rectifier circuit having a first input terminal and a second input terminal for receiving a rectangular wave form that includes a data sequence. A first output terminal and a second output terminal provides a rectified dc output voltage. A first data output terminal is connected to one of the first and the second input terminals, and a second data output terminal is connected to one of the first and the second output terminals, wherein the data output terminals provide an output signal representative of the data sequence. A substantially resistive load may be operatively coupled between the first and second voltage output terminals, the resistive load without a discrete parallel capacitor.

    摘要翻译: 提供一种信号处理电路,其包括具有第一输入端的CMOS桥式整流电路和用于接收包括数据序列的矩形波形的第二输入端。 第一输出端子和第二输出端子提供整流的直流输出电压。 第一数据输出端子连接到第一和第二输入端子之一,第二数据输出端子连接到第一和第二输出端子之一,其中数据输出端子提供表示数据的输出信号 序列。 基本上电阻的负载可以可操作地耦合在第一和第二电压输出端子之间,电阻负载没有分立的并联电容器。