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公开(公告)号:US20240283352A1
公开(公告)日:2024-08-22
申请号:US18336695
申请日:2023-06-16
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Harish Subramanya , Ganesh Subramaniam , Madhan Kumar Kuppaswamy
CPC classification number: H02M1/4266 , H02M1/0009 , H02M1/007 , H02M3/003 , H02M3/33515
Abstract: Controlling power factor correction (PFC) in a flyback converter is described. In one embodiment, an apparatus includes a flyback converter configured to operate with a variable switching frequency. The flyback converter includes a signal transformer, a primary side including a primary-side controller coupled to the signal transformer, and a secondary side including a secondary-side controller coupled to the signal transformer. The secondary-side controller is configured at least to cause a control signal to be generated based on a set of parameters. The control signal controls power factor correction (PFC) for the flyback converter.
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公开(公告)号:US20220200438A1
公开(公告)日:2022-06-23
申请号:US17126814
申请日:2020-12-18
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Murtuza Lilamwala
Abstract: A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground.
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公开(公告)号:US20210058000A1
公开(公告)日:2021-02-25
申请号:US16582690
申请日:2019-09-25
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Hariom Rai
Abstract: Controlling an active clamp field effect transistor (FET) in a secondary-controlled active clamp converter is described. In one embodiment, an apparatus includes a primary-side FET coupled to a transformer, a secondary-side FET coupled to the transformer, and an active clamp FET disposed on a primary side of the transformer. A secondary-side controller is configured to control the active clamp FET across a galvanic isolation barrier.
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公开(公告)号:US11942871B2
公开(公告)日:2024-03-26
申请号:US17127523
申请日:2020-12-18
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Pavan Kumar Kuchipudi , Myeongseok Lee , Murtuza Lilamwala
CPC classification number: H02M7/219 , G06F1/266 , G06F13/4282 , H02J7/0042 , G06F2213/0042
Abstract: A system includes a transformer, a first controller, a discharge circuit to discharge an external capacitor based on an undervoltage threshold, and a second controller. The second controller is coupled to the discharge circuit, and is also coupled to receive a rectified Ac voltage and to receive control signals from the first controller. The second controller includes a gate driver to turn on a primary field effect transistor (FET). The second controller also includes a startup controller coupled to the gate driver. The startup controller is configured to increase a duty cycle of the primary FET based on whether a control signal is received from the first controller. The startup controller is also configured to determine a current duty cycle of the primary FET and to turn off the primary FET based on whether the voltage of the AC-DC converter is above an undervoltage threshold.
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公开(公告)号:US11418108B2
公开(公告)日:2022-08-16
申请号:US17126814
申请日:2020-12-18
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Murtuza Lilamwala
Abstract: A system includes a transformer having a primary winding and an auxiliary winding at a primary side of an AC-DC converter, the auxiliary winding reflecting an output voltage of a secondary winding of the transformer. A primary side controller includes an over-voltage protection (OVP) pin and an OVP circuit. A voltage divider includes a first resistor coupled between the auxiliary winding and the OVP pin and a second resistor coupled between the first resistor and a ground. The voltage divider provides, to OVP pin, a reduced voltage that is proportional to the output voltage. In absence of a pulse signal from a secondary side controller, the OVP circuit turns off a gate driver that drives a primary switch in response to the OVP voltage exceeding a reference OVP voltage. The primary switch is coupled between the primary winding of the transformer and the ground.
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公开(公告)号:US20220200476A1
公开(公告)日:2022-06-23
申请号:US17127523
申请日:2020-12-18
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Pavan Kumar Kuchipudi , Myeongseok Lee , Murtuza Lilamwala
Abstract: A system includes a transformer, a first controller, a discharge circuit to discharge an external capacitor based on an undervoltage threshold, and a second controller. The second controller is coupled to the discharge circuit, and is also coupled to receive a rectified Ac voltage and to receive control signals from the first controller. The second controller includes a gate driver to turn on a primary field effect transistor (FET). The second controller also includes a startup controller coupled to the gate driver. The startup controller is configured to increase a duty cycle of the primary FET based on whether a control signal is received from the first controller. The startup controller is also configured to determine a current duty cycle of the primary FET and to turn off the primary FET based on whether the voltage of the AC-DC converter is above an undervoltage threshold.
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公开(公告)号:US11114945B2
公开(公告)日:2021-09-07
申请号:US16582690
申请日:2019-09-25
Applicant: Cypress Semiconductor Corporation
Inventor: Rashed Ahmed , Hariom Rai
Abstract: Controlling an active clamp field effect transistor (FET) in a secondary-controlled active clamp converter is described. In one embodiment, an apparatus includes a primary-side FET coupled to a transformer, a secondary-side FET coupled to the transformer, and an active clamp FET disposed on a primary side of the transformer. A secondary-side controller is configured to control the active clamp FET across a galvanic isolation barrier.
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公开(公告)号:US11018595B1
公开(公告)日:2021-05-25
申请号:US17027434
申请日:2020-09-21
Applicant: Cypress Semiconductor Corporation
Inventor: Pavan Kumar Kuchipudi , Myeongseok Lee , Rashed Ahmed , Murtuza Lilamwala
Abstract: A secondary controlled AC-DC converter including an oscillator in a primary-side controller (PSC), and method for operating the same to enable soft-start and low frequency operation are provided. Generally, the method includes driving a power switch coupled between an AC input and a primary-side of the converter with a gate-drive (GD-signal). At startup and following auto-restart the GD-signal is generated using an oscillator-signal from the oscillator. After receiving start-stop pulses from a secondary-side controller, the oscillator-signal is decoupled from the GD-signal using a controller in the PSC, and the PSC begins generating the GD-signal using pulse-width-modulated (PWM) generated using the start-stop pulses. The oscillator operates at a first frequency independent of the PWM signal. The PWM signal includes one of a number of frequencies selected based on a power drawn from the converter, and, in low power applications can be less than the first frequency.
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