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公开(公告)号:US20250079852A1
公开(公告)日:2025-03-06
申请号:US18462344
申请日:2023-09-06
Applicant: DELL PRODUCTS L.P.
Inventor: Tsung-Cheng Liao , Wei-Cheng Yu , Merle Jackson Wood III , Chin Jui Liu , Tun-Chieh Liang , Chi-Che Wu
IPC: H02J7/00
Abstract: A power adapter includes a flyback converter and a buck converter. If a first device is a preferred device, then power is allocated to the first device up to a first value. If a second device is plugged in, then power is re-allocating to the first device up to a second value and up to a third value to the second device. A total of the second value and the third value is up to the first value.
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公开(公告)号:US20170179831A1
公开(公告)日:2017-06-22
申请号:US14973456
申请日:2015-12-17
Applicant: Dell Products L.P.
Inventor: Wei Cheng Yu , Tsung-Cheng Liao , Wen-Yung Chang , Merle Jackson Wood, III , Tun-Chieh Liang
IPC: H02M3/335
CPC classification number: H02M3/33569 , H02M2001/0022
Abstract: A zero voltage switching method for a flyback converter featuring a transformer with first and second primary windings and corresponding turns ratios, N1 and N2, includes rectifying and filtering an AC signal to produce a primary DC voltage. A voltage level signal indicating whether the primary DC voltage falls within a particular voltage range is generated. The voltage level signal is used to select a particular primary winding from either the first primary winding or the second primary winding. A PWM controller corresponding to the particular primary winding is activated and an output of the particular PWM controller performs zero voltage switching of a gate terminal of the applicable main switching transistor. A duty cycle of the main switching transistor is maintained within a range of approximately 50% to approximately 60% in accordance with the turns ratio and the primary DC voltage to achieve a desired output voltage.
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公开(公告)号:US20170293347A1
公开(公告)日:2017-10-12
申请号:US15093137
申请日:2016-04-07
Applicant: Dell Products L.P.
Inventor: Merle J. Wood, III , Wei-Cheng Yu , Sean P. O'Neal , Thomas E. Voor , Tsung-Cheng Liao , Tun-Chieh Liang
CPC classification number: G06F13/385 , G06F1/26 , G06F1/32 , G06F13/4282
Abstract: A system and method for performing an intelligent power dongle operation for information handling systems having a serial bus power connection such as a USB type-C power connection. In certain embodiments, the intelligent power dongle includes hardware and firmware to read a legacy adapter PSID information and convert the information to serial information such as USB Type-C baseboard management controller BMC compliant data. In certain embodiments the intelligent power dongle includes power management circuitry the allow selection and proper switching between a low voltage power mode (e.g., a 5V power mode) and a higher voltage power mode (e.g., a 19.5V power mode) depending on a device attached to the intelligent power dongle. In certain embodiments, the intelligent power dongle may be used to power low voltage devices (e.g., devices powered by 5V).
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公开(公告)号:US10346333B2
公开(公告)日:2019-07-09
申请号:US15093137
申请日:2016-04-07
Applicant: Dell Products L.P.
Inventor: Merle J. Wood, III , Wei-Cheng Yu , Sean P. O'Neal , Thomas E. Voor , Tsung-Cheng Liao , Tun-Chieh Liang
Abstract: A system and method for performing an intelligent power dongle operation for information handling systems having a serial bus power connection such as a USB type-C power connection. In certain embodiments, the intelligent power dongle includes hardware and firmware to read a legacy adapter PSID information and convert the information to serial information such as USB Type-C baseboard management controller BMC compliant data. In certain embodiments the intelligent power dongle includes power management circuitry the allow selection and proper switching between a low voltage power mode (e.g., a 5V power mode) and a higher voltage power mode (e.g., a 19.5V power mode) depending on a device attached to the intelligent power dongle. In certain embodiments, the intelligent power dongle may be used to power low voltage devices (e.g., devices powered by 5V).
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公开(公告)号:US09979300B1
公开(公告)日:2018-05-22
申请号:US15417498
申请日:2017-01-27
Applicant: Dell Products L.P.
Inventor: Merle Wood , Wei-Cheng Yu , Tun-Chieh Liang , Tsung-Cheng Liao , Wen-Yung Chang
CPC classification number: H02M3/33507 , H02M1/44 , H02M3/33569 , H02M3/337 , H02M2001/0058
Abstract: Systems and methods for enhancing peak power capability and hold-up time in a resonant converter having a LLC topology may include a couple choke transformer circuit that may control an inductance of the couple choke transformer circuit and improve power efficiency of the resonant converter. The resonant converter may also include a resonant tank circuit that may provide improved peak power delivery of the resonant converter. The resonant converter may further include a resonant tank control circuit to control the resonant tank circuit and may increase the peak gain of the resonant converter, increase a voltage range of the input voltage, and extend a hold-up time of the input voltage when an AC power failure occurs.
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公开(公告)号:US09843265B2
公开(公告)日:2017-12-12
申请号:US14973456
申请日:2015-12-17
Applicant: Dell Products L.P.
Inventor: Wei Cheng Yu , Tsung-Cheng Liao , Wen-Yung Chang , Merle Jackson Wood, III , Tun-Chieh Liang
CPC classification number: H02M3/33569 , H02M2001/0022
Abstract: A zero voltage switching method for a flyback converter featuring a transformer with first and second primary windings and corresponding turns ratios, N1 and N2, includes rectifying and filtering an AC signal to produce a primary DC voltage. A voltage level signal indicating whether the primary DC voltage falls within a particular voltage range is generated. The voltage level signal is used to select a particular primary winding from either the first primary winding or the second primary winding. A PWM controller corresponding to the particular primary winding is activated and an output of the particular PWM controller performs zero voltage switching of a gate terminal of the applicable main switching transistor. A duty cycle of the main switching transistor is maintained within a range of approximately 50% to approximately 60% in accordance with the turns ratio and the primary DC voltage to achieve a desired output voltage.
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