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公开(公告)号:US20200163210A1
公开(公告)日:2020-05-21
申请号:US16630232
申请日:2018-07-25
Applicant: DENKA COMPANY LIMITED
Inventor: Akimasa YUASA , Yusaku HARADA , Takahiro NAKAMURA , Shuhei MORITA , Kouji NISHIMURA
Abstract: A ceramic circuit substrate having high bonding performance and excellent thermal cycling resistance properties, having a circuit pattern provided on a ceramic substrate with a braze material layer interposed therebetween, and a protruding portion formed by the braze material layer protruding from the outer edge of the circuit pattern, wherein: the braze material layer includes Ag, Cu, Ti, and Sn or In; and an Ag-rich phase is formed continuously for 300 μm or more, towards the inside, from an outer edge of the protruding portion, along a bonding interface between the ceramic substrate and the circuit pattern, and has a bonding void ratio of 1.0% or less.
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公开(公告)号:US20190115228A1
公开(公告)日:2019-04-18
申请号:US16097131
申请日:2017-04-25
Applicant: Denka Company Limited
Inventor: Akimasa YUASA , Kouji NISHIMURA
IPC: H01L21/48 , H01L23/498
Abstract: [Problem] To obtain a ceramic circuit substrate for a power module wherein an insulating resin for preventing solder flow and chip displacement and an insulating resin for preventing partial discharges and lowering of insulation are applied, without lowering productivity or worsening partial discharge properties, or lowering the insulating properties due to positional displacement of the insulating resins. [Solution] A ceramic circuit substrate for a power module is obtained by applying an insulating resin for preventing solder flow and chip displacement and an insulating resin for preventing partial discharges and the lowering of insulation to a main surface of a metal circuit and to the outer periphery of the metal circuit or between metal circuits, respectively.
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公开(公告)号:US20210176860A1
公开(公告)日:2021-06-10
申请号:US16616902
申请日:2018-05-29
Applicant: DENKA COMPANY LIMITED
Inventor: Yuta TSUGAWA , Kouji NISHIMURA , Yusaku HARADA , Ryota AONO , Shoji IWAKIRI
Abstract: A ceramic circuit substrate having high bonding performance and excellent thermal cycling resistance properties, wherein a ceramic substrate and a copper plate are bonded by a braze material containing Ag and Cu, at least one active metal component selected from Ti and Zr, and at least one element selected from among In, Zn, Cd, and Sn, wherein a braze material layer, after bonding, has a continuity ratio of 80% or higher and a Vickers hardness of 60 to 85 Hv.
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公开(公告)号:US20210176859A1
公开(公告)日:2021-06-10
申请号:US16616837
申请日:2018-05-29
Applicant: DENKA COMPANY LIMITED
Inventor: Akimasa YUASA , Yusaku HARADA , Takahiro NAKAMURA , Shuhei MORITA , Kouji NISHIMURA
Abstract: A ceramic circuit substrate having a metal plate bonded, by a bonding braze material, to at least one main surface of a ceramic substrate, wherein the bonding braze material contains, as metal components, 0.5 to 4.0 parts by mass of at least one active metal selected from among titanium, zirconium, hafnium, and niobium, with respect to 100 parts by mass, in total, of 93.0 to 99.4 parts by mass of Ag, 0.1 to 5.0 parts by mass of Cu, and 0.5 to 2.0 parts by mass of Sn; and Cu-rich phases in a bonding braze material layer structure between the ceramic substrate and the metal plate have an average size of 3.5 μm or less and a number density of 0.015/μm2 or higher. A method for producing a ceramic circuit substrate includes bonding at a temperature of 855 to 900° C. for a retention time of 10 to 60 minutes.
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公开(公告)号:US20200185320A1
公开(公告)日:2020-06-11
申请号:US16619414
申请日:2018-06-07
Applicant: DENKA COMPANY LIMITED
Inventor: Ryota AONO , Fumihiro NAKAHARA , Kouji NISHIMURA , Yuta TSUGAWA
IPC: H01L23/498 , H01L23/15 , H01L21/48 , H01L23/00 , H01L23/373 , C23C18/42
Abstract: A ceramic circuit substrate is suitable for silver nanoparticle bonding of semiconductor elements and has excellent close adhesiveness with a power module sealing resin. A ceramic circuit substrate has a copper plate bonded, by a braze material, to both main surfaces of a ceramic substrate including aluminum nitride or silicon nitride, the copper plate of at least one of the main surfaces being subjected to silver plating, wherein: the copper plate side surfaces are not subjected to silver plating; the thickness of the silver plating is 0.1 μm to 1.5 μm; and the arithmetic mean roughness Ra of the surface roughness of the circuit substrate after silver plating is 0.1 μm to 1.5 μm.
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