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公开(公告)号:US12015006B2
公开(公告)日:2024-06-18
申请号:US17688992
申请日:2022-03-08
Inventor: Shohei Nagai
IPC: H01L23/00
CPC classification number: H01L24/32 , H01L24/29 , H01L24/83 , H01L2224/29111 , H01L2224/32155 , H01L2224/83815 , H01L2924/01029 , H01L2924/0105 , H01L2924/014
Abstract: A semiconductor device includes a substrate, a semiconductor element and a tin-based solder layer. The semiconductor element faces the substrate in a normal direction of the substrate. The normal direction corresponds to a normal line of the substrate. The tin-based solder layer joins the semiconductor element to the substrate. The tin-based solder layer a central portion and a peripheral portion surrounding the central portion. The tin-based solder layer has a tin crystal with a C-axis at each of the central portion and the peripheral portion. The C-axis at the central portion intersects the normal line at an angle larger than 45 degrees with respect to the normal line. The C-axis at the peripheral portion either intersects the normal line at an angle smaller than or equal to 45 degrees with respect to the normal line, or is parallel to the normal line.
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公开(公告)号:US20220319998A1
公开(公告)日:2022-10-06
申请号:US17679603
申请日:2022-02-24
Inventor: Shohei Nagai
IPC: H01L23/538 , H01L25/07 , H01L25/18 , H01L23/367 , H01L25/16
Abstract: A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a first terminal and a second terminal arranged on the first surface or the second surface, respectively; a first internal conductor pattern arranged in a first circuit layer arranged between the electric component and the first surface, and electrically connected to the first terminal and the electric component; and a second internal conductor pattern arranged in a second circuit layer arranged between the electric component and the second surface, and electrically connected to the second terminal and the electric component. The first internal conductor pattern and the second internal conductor pattern are at least partially opposed to each other inside the substrate main body.
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公开(公告)号:US11825594B2
公开(公告)日:2023-11-21
申请号:US17679622
申请日:2022-02-24
Inventor: Shohei Nagai
CPC classification number: H05K1/021 , H05K1/0206 , H05K1/03 , H05K1/115 , H05K1/185
Abstract: A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a surface conductor pattern arranged in a first circuit layer located on the second surface. Also included is a first internal conductor pattern and a second internal conductor pattern arranged in a second circuit layer located between the electric component and the second surface, and insulated from each other. Also, at least one first heat conductor via extends from the electric component to the first internal conductor pattern; and at least one second heat conductor via extends from the surface conductor pattern to the second internal conductor pattern.
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公开(公告)号:US20250105704A1
公开(公告)日:2025-03-27
申请号:US18971405
申请日:2024-12-06
Applicant: DENSO CORPORATION
Inventor: Shohei Nagai , Jiro Hayashi
Abstract: An EPU includes a motor device, an inverter device, a unit housing, and a cooling device. The motor device includes a motor and a motor housing. The inverter device includes an inverter and an inverter housing. The motor and the inverter are accommodated in the unit housing. The cooling device includes a refrigerant passage and a refrigerant pump. The refrigerant pump causes the refrigerant to flow to circulate through the refrigerant passage. The unit housing includes a refrigerant fin to dissipate heat of the refrigerant to an outside. The refrigerant fin is provided on a unit outer surface.
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公开(公告)号:US12100638B2
公开(公告)日:2024-09-24
申请号:US17684550
申请日:2022-03-02
Inventor: Shohei Nagai
IPC: H01L23/367 , H01L23/00 , H01L23/36 , H01L23/373 , H01L23/427 , H01L25/07
CPC classification number: H01L23/3675 , H01L23/36 , H01L23/3738 , H01L23/4275 , H01L24/24 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/072 , H01L2224/24246 , H01L2224/32245 , H01L2224/48175 , H01L2224/73265 , H01L2924/1815 , H01L2924/182
Abstract: A semiconductor device includes a semiconductor chip, a heat sink, a resin package, heat transfer material and multiple spacers. The heat sink absorbs heat of the semiconductor chip. The resin package accommodates the semiconductor chip, and the resin package has a surface at which the heat sink is disposed. The heat transfer material has fluidity, and the heat transfer material is filled between the heat sink and the cooling plate. The spacers are dispersedly arranged in the heat transfer material, and the spacers are in contact with the heat sink and the cooling plate.
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公开(公告)号:US12074113B2
公开(公告)日:2024-08-27
申请号:US17679603
申请日:2022-02-24
Inventor: Shohei Nagai
IPC: H01L23/367 , H01L23/538 , H01L25/07 , H01L25/16 , H01L25/18
CPC classification number: H01L23/5389 , H01L23/367 , H01L25/072 , H01L25/16 , H01L25/18
Abstract: A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a first terminal and a second terminal arranged on the first surface or the second surface, respectively; a first internal conductor pattern arranged in a first circuit layer arranged between the electric component and the first surface, and electrically connected to the first terminal and the electric component; and a second internal conductor pattern arranged in a second circuit layer arranged between the electric component and the second surface, and electrically connected to the second terminal and the electric component. The first internal conductor pattern and the second internal conductor pattern are at least partially opposed to each other inside the substrate main body.
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公开(公告)号:US12004333B2
公开(公告)日:2024-06-04
申请号:US17684469
申请日:2022-03-02
Inventor: Shohei Nagai
IPC: H05K7/20 , H01L23/473 , H02M7/537
CPC classification number: H05K7/20927 , H01L23/473 , H02M7/537
Abstract: A power converter includes: a semiconductor module that includes a semiconductor element for power conversion, the semiconductor module having a module surface on which an input terminal electrically connected to the semiconductor element is disposed; a capacitor in which a capacitor terminal is disposed, the capacitor having a capacitor surface facing the module surface; a cooler that is disposed between the semiconductor module and the capacitor; and a connecting member that electrically connects the input terminal and the capacitor terminal.
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