公开(公告)号：US20130137388A1

公开(公告)日：2013-05-30

申请号：US13423472

申请日：2012-03-19

申请人： Daisuke Miyashita

发明人： Daisuke Miyashita

IPC分类号： H04B1/06 ,  H03F3/45

CPC分类号： H03F3/195 ,  H03F3/45475 ,  H03F3/45977 ,  H03F3/45986 ,  H03F2200/294 ,  H03F2203/45212 ,  H03F2203/45522 ,  H03F2203/45591 ,  H03G3/3073 ,  H03G3/3078

摘要： The first control circuit controls the gain of the variable gain amplifier circuit and the cut-off frequency of the first low-pass filter so as to keep constant a product of a transfer function of the variable gain amplifier circuit and a transfer function of the first low-pass filter. The second control circuit compares a level of the second feedback signal and a preset threshold value after completion of gain control of the variable gain amplifier circuit, the second control circuit inputting the signal outputted from the first low-pass filter, as the first feedback signal to the first terminal as long as the level of the second feedback signal is not lower than the threshold value, the second control circuit inputting the signal outputted from the second low-pass filter, as the first feedback signal to the first terminal.

摘要翻译： 第一控制电路控制可变增益放大器电路的增益和第一低通滤波器的截止频率，以保持恒定的可变增益放大器电路的传递函数和第一低通滤波器的传递函数的乘积 低通滤波器。 第二控制电路将可变增益放大器电路的增益控制完成后的第二反馈信号的电平与预设的阈值进行比较，第二控制电路输入从第一低通滤波器输出的信号作为第一反馈信号 只要第二反馈信号的电平不低于阈值，第二控制电路将从第二低通滤波器输出的信号作为第一反馈信号输入到第一端子。

公开(公告)号：US08446302B2

公开(公告)日：2013-05-21

申请号：US13052303

申请日：2011-03-21

申请人： Daisuke Miyashita

发明人： Daisuke Miyashita

IPC分类号： H03M1/48

CPC分类号： G04F10/005 ,  H03L7/085 ,  H03L2207/50

摘要： According to one embodiment, a multiphase circuit, a flip-flop, and a decoder are provided. The multiphase circuit generates multiphase signals of which phases are different from each other by 180/M degrees by dividing a differential oscillation signal by M (M is an integral number not smaller than 2). The flip-flop captures the multiphase signal in synchronization with an input of a reference signal. The decoder decodes an output signal of the flip-flop.

摘要翻译： 根据一个实施例，提供了多相电路，触发器和解码器。 多相电路通过将差分振荡信号除以M（M是不小于2的整数）来产生相位彼此相差180 / M度的多相信号。 触发器与参考信号的输入同步捕获多相信号。 解码器解码触发器的输出信号。

公开(公告)号：US08073408B2

公开(公告)日：2011-12-06

申请号：US12489860

申请日：2009-06-23

申请人： Jun Deguchi ,  Daisuke Miyashita ,  Hideyuki Kokatsu

发明人： Jun Deguchi ,  Daisuke Miyashita ,  Hideyuki Kokatsu

IPC分类号： H04B1/04 ,  H04K3/00

CPC分类号： H04B1/04 ,  H04B2001/0491

摘要： A semiconductor integrated circuit includes a first input terminal configured to input a baseband signal, a second input terminal configured to input a local oscillation signal, an output terminal configured to output a modulating signal, a first amplifier circuit configured to receive the baseband signal through the first input terminal and to output a first amplified signal of the baseband signal, a 2-multiplying circuit configured to receive the local oscillation signal through the second input terminal and to output a 2-multiplied signal of the local oscillation signal, an adder configured to add the 2-multiplied signal and the first amplified signal and to output an addition signal, a second amplifier circuit configured to receive the addition signal and to output a second amplified signal of the addition signal, and a mixer configured to multiply the second amplified signal and the local oscillation signal and to output the modulating signal to the output terminal.

摘要翻译： 半导体集成电路包括被配置为输入基带信号的第一输入端子，被配置为输入本地振荡信号的第二输入端子，被配置为输出调制信号的输出端子，被配置为通过所述第一输入端子接收基带信号的第一放大器电路 第一输入端并输出基带信号的第一放大信号; 2倍增电路，被配置为通过第二输入端接收本地振荡信号，并输出本地振荡信号的2相乘信号;加法器，被配置为 添加2倍增信号和第1放大信号并输出​​加法信号;第2放大电路，被配置为接收相加信号并输出​​加法信号的第2放大信号;以及混频器，被配置为将第2放大信号 和本地振荡信号，并将调制信号输出到输出端。

公开(公告)号：US08023911B2

公开(公告)日：2011-09-20

申请号：US12271363

申请日：2008-11-14

申请人： Daisuke Miyashita

发明人： Daisuke Miyashita

IPC分类号： H04B1/04

CPC分类号： H03F3/45475 ,  H03F3/45183 ,  H03F2203/45454 ,  H03F2203/45466 ,  H03F2203/45504 ,  H03F2203/45526

摘要： An amplifying device has an amplifier which amplifies an input signal supplied from an input terminal and outputs the amplified input signal, a feedback loop which has at least one of a resistive element and a capacitance connected between an output terminal of the amplifier and the input terminal, a variable current unit which adjusts a current value in accordance with a controlling signal and supplies an operating current to the amplifier, a signal analyzing unit which generates a time difference signal having a value corresponding to a slew rate of the input signal and outputs the time difference signal, and a controlling unit which generates the controlling signal in accordance with the time difference signal and outputs the controlling signal.

摘要翻译： 放大装置具有放大从输入端提供的输入信号并输出​​放大的输入信号的放大器，反馈回路具有电阻元件和连接在放大器的输出端子与输入端子之间的电容中的至少一个 ，可变电流单元，其根据控制信号调整电流值并向放大器提供工作电流;信号分析单元，其产生具有与输入信号的转换速率对应的值的时间差信号，并输出 时差信号，以及根据该时差信号生成控制信号并输出​​控制信号的控制单元。

公开(公告)号：US08340620B2

公开(公告)日：2012-12-25

申请号：US13369536

申请日：2012-02-09

申请人： Shouhei Kousai ,  Daisuke Miyashita ,  Jun Deguchi

发明人： Shouhei Kousai ,  Daisuke Miyashita ,  Jun Deguchi

IPC分类号： H04B1/26

CPC分类号： H03D7/125

摘要： A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.

摘要翻译： 输出通过混合第一输入信号和第二输入信号而获得的输出信号的频率转换电路具有：输入第一输入信号的第一输入端; 输入第二输入信号的第二输入端; 输出信号输出的输出端子; 具有连接到第一输入端子的第一输入部分和连接到输出端子的输出部分的频率转换元件根据输入到第二输入部分的信号来限制输入到第一输入部分的信号，并输出受限信号 到输出部分; 以及脉冲控制电路，其经由所述第二输入端子接收所述第二输入信号，并将通过将所述第二输入信号的脉冲限制到所述频率转换元件的所述第二输入部分而获得的脉冲信号。

公开(公告)号：US20120176165A1

公开(公告)日：2012-07-12

申请号：US13397742

申请日：2012-02-16

申请人： Jun Deguchi ,  Daisuke Miyashita

发明人： Jun Deguchi ,  Daisuke Miyashita

IPC分类号： H03B19/00

CPC分类号： H03B19/14

摘要： A semiconductor integrated circuit includes a mixer circuit unit having a first single gate mixer configured to receive a first input signal having a first frequency and a second input signal having a second frequency as inputs, a second single gate mixer configured to receive the first input signal and a third input signal of a phase inverted from a phase of the second input signal as inputs, a third single gate mixer configured to receive a fourth input signal of a phase inverted from the phase of the first input signal and the second input signal as inputs, and a fourth single gate mixer configured to receive the third and the fourth input signals as inputs; and a ½-frequency divider unit configured to receive output signals from the first to the fourth single gate mixers as inputs and output a desired signal.

摘要翻译： 半导体集成电路包括具有第一单栅极混频器的混频器电路单元，其被配置为接收具有第一频率的第一输入信号和具有第二频率的第二输入信号作为输入;第二单门混频器，被配置为接收第一输入信号 以及从所述第二输入信号的相位反转的相位的第三输入信号作为输入;第三单门混频器，被配置为接收从所述第一输入信号和所述第二输入信号的相位反相的相位的第四输入信号， 配置为接收第三和第四输入信号作为输入的第四单门混频器; 以及1/2分频器单元，被配置为从第一至第四单个栅极混合器接收输出信号作为输入并输出期望的信号。

公开(公告)号：US07999628B2

公开(公告)日：2011-08-16

申请号：US12555985

申请日：2009-09-09

申请人： Daisuke Miyashita

发明人： Daisuke Miyashita

IPC分类号： H03L1/00

CPC分类号： H03B5/1228 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1278

摘要： This invention includes a bias origination section configured to originate an original bias voltage; a comparison section configured to compare the original bias voltage and a comparison voltage, and output a comparison result; a resistive divider section composed by a resistance circuit including a variable resistor section having a resistor and a switch, and configured to generate the comparison voltage; a bias decision control section configured to determine bias decision data for controlling a resistance value of the variable resistor section so as to bring the comparison voltage close to the original bias voltage, based on a comparison result of the comparison section; and a storage section configured to hold the bias decision data and also output the comparison voltage as a bias voltage by controlling a resistance value of the variable resistor section based on the held bias decision data, thereby generating a low-noise bias with a small area.

摘要翻译： 本发明包括：偏置起始部分，被配置为产生原始偏置电压; 比较部，被配置为比较原始偏置电压和比较电压，并输出比较结果; 电阻分压器部分，由包括具有电阻器和开关的可变电阻器部分的电阻电路组成，并被配置为产生比较电压; 偏置判定控制部，被配置为基于比较部的比较结果来确定用于控制可变电阻部的电阻值的偏置判定数据，以使比较电压接近原来的偏置电压; 以及存储部，被配置为保持偏置判定数据，并且还通过基于所保持的偏置判定数据控制可变电阻器部分的电阻值，将比较电压作为偏置电压输出，由此产生具有小面积的低噪声偏置 。

公开(公告)号：US07898332B2

公开(公告)日：2011-03-01

申请号：US12560828

申请日：2009-09-16

申请人： Jun Deguchi ,  Daisuke Miyashita

发明人： Jun Deguchi ,  Daisuke Miyashita

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F1/30 ,  H03F3/45632 ,  H03F2200/453 ,  H03F2203/45244 ,  H03F2203/45508

摘要： A semiconductor integrated circuit device includes: an amplifier circuit which respectively has one or more input terminals and one or more output terminals; a replica circuit which has the same DC characteristics as those of the amplifier circuit; a reference voltage generation circuit which is connected to a bias terminal of the replica circuit, and which generates a predetermined reference voltage at the bias terminal; and a feedback circuit which takes a difference between the reference voltage generated at the bias terminal of the replica circuit and the voltage generated at a bias terminal of the amplifier circuit, and which performs feedback control by providing negative feedback of the difference to the bias terminal of the amplifier circuit so that the voltage generated at the bias terminal of the amplifier circuit is made equal to the reference voltage generated at the bias terminal of the replica circuit.

摘要翻译： 一种半导体集成电路器件，包括：分别具有一个或多个输入端子和一个或多个输出端子的放大器电路; 具有与放大电路相同的DC特性的复制电路; 参考电压产生电路，其连接到所述复制电路的偏置端子，并且在所述偏置端子处产生预定的参考电压; 以及反馈电路，其将复制电路的偏置端子处产生的参考电压与在放大器电路的偏置端子处产生的电压之间产生差异，并且通过向偏置端子提供差分的负反馈来执行反馈控制 使得在放大器电路的偏置端产生的电压等于在复制电路的偏置端产生的参考电压。

公开(公告)号：US07872544B2

公开(公告)日：2011-01-18

申请号：US12192547

申请日：2008-08-15

申请人： Daisuke Miyashita

发明人： Daisuke Miyashita

IPC分类号： H03C3/02 ,  H04L27/36 ,  H04L27/38

CPC分类号： H03C3/40 ,  H03D3/007

摘要： A modulation/demodulation apparatus according to an embodiment of the present invention includes a sine wave generating circuit configured to output two sine waves which are orthogonal to each other and have equal amplitude, an orthogonal modulator connected to the sine wave generating circuit and configured to modulate the sine waves to generate a modulated signal, a detecting section configured to detect amplitude fluctuation in the modulated signal, a multiplying section configured to multiply the modulated signal and the amplitude fluctuation detected by the detecting section together, and an orthogonal demodulator configured to demodulate the modulated signal multiplied with the amplitude fluctuation by the multiplying section to generate a demodulated signal.

摘要翻译： 根据本发明的实施例的调制/解调装置包括：正弦波产生电路，被配置为输出彼此正交并且具有相等振幅的两个正弦波;正交调制器，连接到正弦波发生电路，并被配置为调制 所述正弦波产生调制信号，检测部，被配置为检测所述调制信号中的幅度波动;乘法部，被配置为将所述调制信号和由所述检测部检测的幅度波动相乘在一起;以及正交解调器， 调制信号与乘法部分的振幅波动相乘以产生解调信号。

公开(公告)号：US20100271106A1

公开(公告)日：2010-10-28

申请号：US12723822

申请日：2010-03-15

申请人： Jun Deguchi ,  Daisuke Miyashita

发明人： Jun Deguchi ,  Daisuke Miyashita

IPC分类号： G06G7/16

CPC分类号： H03B19/14

摘要： A semiconductor integrated circuit includes a mixer circuit unit having a first single gate mixer configured to receive a first input signal having a first frequency and a second input signal having a second frequency as inputs, a second single gate mixer configured to receive the first input signal and a third input signal of a phase inverted from a phase of the second input signal as inputs, a third single gate mixer configured to receive a fourth input signal of a phase inverted from the phase of the first input signal and the second input signal as inputs, and a fourth single gate mixer configured to receive the third and the fourth input signals as inputs; and a 1/2-frequency divider unit configured to receive output signals from the first to the fourth single gate mixers as inputs and output a desired signal.

摘要翻译： 半导体集成电路包括具有第一单栅极混频器的混频器电路单元，其被配置为接收具有第一频率的第一输入信号和具有第二频率的第二输入信号作为输入;第二单门混频器，被配置为接收第一输入信号 以及从所述第二输入信号的相位反转的相位的第三输入信号作为输入;第三单门混频器，被配置为接收从所述第一输入信号和所述第二输入信号的相位反相的相位的第四输入信号， 配置为接收第三和第四输入信号作为输入的第四单门混频器; 以及1/2频分频器单元，被配置为从第一至第四单栅极混频器接收输出信号作为输入并输出期望的信号。