公开(公告)号：US08281185B2

公开(公告)日：2012-10-02

申请号：US12494934

申请日：2009-06-30

申请人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

发明人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

IPC分类号： G06F11/00

CPC分类号： G06F11/141 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/30123 ,  G06F9/3834 ,  G06F9/3842 ,  G06F9/3861 ,  G06F9/467 ,  G06F11/0766 ,  G06F11/0793

摘要： One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a failure state of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides an advice state associated with the recorded failure state to the program to facilitate a response to the transaction failure by the program.

摘要翻译： 一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。 在操作期间，系统使用硬件事务存储器机制在执行事务期间记录事务的故障状态。 接下来，系统检测与事务相关联的事务失败。 最后，系统向程序提供与记录的故障状态相关联的建议状态，以便于程序对事务失败的响应。

公开(公告)号：US08225139B2

公开(公告)日：2012-07-17

申请号：US12493447

申请日：2009-06-29

申请人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

发明人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

IPC分类号： G06F9/00

CPC分类号： G06F9/30087 ,  G06F9/3842 ,  G06F9/3865 ,  G06F12/0817

摘要： One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a misspeculation indicator of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides the recorded misspeculation indicator to the program to facilitate a response to the transaction failure by the program.

摘要翻译： 一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。 在操作期间，系统使用硬件事务存储器机制在执行事务期间记录事务的错误指示符。 接下来，系统检测与事务相关联的事务失败。 最后，系统向程序提供记录的错误指示符，以便程序响应交易失败。

公开(公告)号：US20110078385A1

公开(公告)日：2011-03-31

申请号：US12570591

申请日：2009-09-30

申请人： Yosef Lev ,  Daniel S. Nussbaum ,  Mark S. Moir

发明人： Yosef Lev ,  Daniel S. Nussbaum ,  Mark S. Moir

IPC分类号： G06F12/00 ,  G06F9/46

CPC分类号： G06F9/467

摘要： The software transactional memory system described herein may implement a revocable mechanism for managing read ownership in a shared memory. In this system, write ownership may be revoked by readers or writers at any time other than when a writer transaction is in a commit state, wherein its write ownership is irrevocable. An ownership record associated with one or more locations in the shared memory may include an indication of whether the memory locations are owned for writing, and an identifier of the latest writer. A read ownership array may record data indicating which, if any, threads currently own the memory locations for reading. The system may provide an efficient read-validation operation, in which a full read-set validation is avoided unless a change in a global read-write conflict counter value indicates a potential conflict. The system may support a wide range of contention management policies, and may provide implicit privatization.

摘要翻译： 本文描述的软件事务存储器系统可以实现用于管理共享存储器中的读取所有权的可撤销机制。 在该系统中，写入所有权可以在写入器交易处于提交状态之外的任何时候被读者或作者撤销，其中写入所有权是不可撤销的。 与共享存储器中的一个或多个位置相关联的所有权记录可以包括存储器位置是否拥有用于写入的指示以及最新写入器的标识符。 读取所有权阵列可以记录指示线程当前拥有哪个（如果有的话）拥有用于读取的存储器位置的数据。 系统可以提供有效的读取验证操作，其中避免完全读取确认，除非全局读写冲突计数器值的改变表示潜在的冲突。 该系统可以支持广泛的争用管理策略，并可能提供隐含的私有化。

公开(公告)号：US08560816B2

公开(公告)日：2013-10-15

申请号：US12827842

申请日：2010-06-30

申请人： Mark S. Moir ,  David Dice ,  Daniel S. Nussbaum ,  James R. Goodman

发明人： Mark S. Moir ,  David Dice ,  Daniel S. Nussbaum ,  James R. Goodman

IPC分类号： G06F9/00

CPC分类号： G06F9/3863 ,  G06F9/3834 ,  G06F9/3859

摘要： Systems and methods described herein for performing incremental register checkpointing may employ a special register to indicate which registers have already been checkpointed. This register may include one bit per register. These systems may also include a special pointer register whose value identifies a location in user memory or in dedicated on-chip storage at which a copy of a register's value should be saved by a checkpointing operation. Only registers modified during speculative execution or execution of a transaction may be checkpointed (e.g., when register modifying instructions are encountered) and subsequently restored (e.g., due to misspeculation or transaction abort), rather than all of the registers of the processor. Each register may be checkpointed at most once for a given speculative episode or atomic transaction. Setting a bit in the special register may prevent checkpointing of the corresponding register. Setting all of the bits in the special register may disable checkpointing.

摘要翻译： 本文描述的用于执行增量寄存器检查点的系统和方法可以使用特殊寄存器来指示哪些寄存器已经被检查点。 该寄存器可以包括每个寄存器一位。 这些系统还可以包括特殊的指针寄存器，其特征指针寄存器的值标识用户存储器中的位置或专用片上存储器，通过检查点操作应该保存寄存器值的副本。 只有在推测性执行或执行交易期间修改的寄存器可以是检查点（例如，当遇到寄存器修改指令时）并且随后恢复（例如，由于错误设置或事务中止）而不是处理器的所有寄存器。 对于给定的投机事件或原子事务，每个寄存器最多可以被检查点一次。 在特殊寄存器中设置一位可能会阻止相应寄存器的检查点。 设置特殊寄存器中的所有位可能会禁用检查点。

公开(公告)号：US08402227B2

公开(公告)日：2013-03-19

申请号：US12750908

申请日：2010-03-31

申请人： Mark S. Moir ,  Yosef Lev ,  Daniel S. Nussbaum

发明人： Mark S. Moir ,  Yosef Lev ,  Daniel S. Nussbaum

IPC分类号： G06F12/00 ,  G06F9/46

CPC分类号： G06F11/141 ,  G06F9/467

摘要： The system and methods described herein may exploit hardware transactional memory to improve the performance of a software or hybrid transactional memory implementation, even when an entire user transaction cannot be executed within a hardware transaction. The user code of an atomic transaction may be executed within a software transaction, which may collect read and write sets and/or other information about the atomic transaction. A single hardware transaction may be used to commit the atomic transaction by validating the transaction's read set and applying the effects of the user code to memory, reducing the overhead associated with commitment of software transactions. Because the hardware transaction code is carefully controlled, it may be less likely to fail to commit. Various remedial actions may be taken before retrying hardware transactions following some failures. If a transaction exceeds the constraints of the hardware, it may be committed by the software transactional memory alone.

摘要翻译： 本文描述的系统和方法可以利用硬件事务存储器来改善软件或混合事务性存储器实现的性能，即使在硬件事务中不能执行整个用户事务。 原子事务的用户代码可以在软件事务中执行，其可以收集关于原子事务的读取和写入集合和/或其他信息。 可以使用单个硬件事务来通过验证事务的读取集合并将用户代码的效果应用于存储器来提交原子事务，从而减少与承诺的软件事务相关的开销。 由于硬件事务代码被严格控制，所以可能不太可能无法提交。 在出现某些故障之后重试硬件事务之前，可能会采取各种补救措施。 如果事务超出了硬件的限制，则可能仅由软件事务内存提交。

公开(公告)号：US20120005461A1

公开(公告)日：2012-01-05

申请号：US12827842

申请日：2010-06-30

申请人： Mark S. Moir ,  David Dice ,  Daniel S. Nussbaum ,  James R. Goodman

发明人： Mark S. Moir ,  David Dice ,  Daniel S. Nussbaum ,  James R. Goodman

IPC分类号： G06F9/312

CPC分类号： G06F9/3863 ,  G06F9/3834 ,  G06F9/3859

摘要： Systems and methods described herein for performing incremental register checkpointing may employ a special register to indicate which registers have already been checkpointed. This register may include one bit per register. These systems may also include a special pointer register whose value identifies a location in user memory or in dedicated on-chip storage at which a copy of a register's value should be saved by a checkpointing operation. Only registers modified during speculative execution or execution of a transaction may be checkpointed (e.g., when register modifying instructions are encountered) and subsequently restored (e.g., due to misspeculation or transaction abort), rather than all of the registers of the processor. Each register may be checkpointed at most once for a given speculative episode or atomic transaction. Setting a bit in the special register may prevent checkpointing of the corresponding register. Setting all of the bits in the special register may disable checkpointing.

摘要翻译： 本文描述的用于执行增量寄存器检查点的系统和方法可以使用特殊寄存器来指示哪些寄存器已经被检查点。 该寄存器可以包括每个寄存器一位。 这些系统还可以包括特殊的指针寄存器，其特征指针寄存器的值标识用户存储器中的位置或专用片上存储器，通过检查点操作应该保存寄存器值的副本。 只有在推测性执行或执行交易期间修改的寄存器可以是检查点（例如，当遇到寄存器修改指令时）并且随后恢复（例如，由于错误设置或事务中止）而不是处理器的所有寄存器。 对于给定的投机事件或原子事务，每个寄存器最多可以被检查点一次。 在特殊寄存器中设置一位可能会阻止相应寄存器的检查点。 设置特殊寄存器中的所有位可能会禁用检查点。

公开(公告)号：US20090172306A1

公开(公告)日：2009-07-02

申请号：US11967371

申请日：2007-12-31

申请人： Daniel S. Nussbaum ,  Mark S. Moir

发明人： Daniel S. Nussbaum ,  Mark S. Moir

IPC分类号： G06F12/00 ,  G06F9/06

CPC分类号： G06F9/466

摘要： A phased transactional memory (PhTM) may support a plurality of transactional memory implementations, including software, hardware, and hybrid implementations, and may provide mechanisms for dynamically transitioning between transactional memory modes in response to changing workload characteristics; upon discovering that the current mode does not perform well, is not suitable, or does not support functionality required for particular transactions; or according to scheduled phases. A system providing PhTM may be configured to transition from a first transactional memory mode to a second transactional memory mode while ensuring that transactions executing in the first transactional memory mode do not interfere with correct execution of transactions in the second transactional memory mode. The system may be configured to abort transactions in progress or to wait for transactions to complete, be aborted, or reach a safe transition point before transitioning to a new mode, and may use a global mode indicator in coordinating transitions.

摘要翻译： 分阶段事务存储器（PhTM）可以支持包括软件，硬件和混合实现在内的多个事务存储器实现，并且可以提供用于响应于变化的工作负载特性而在事务存储器模式之间动态转换的机制; 在发现当前模式不能很好的情况下，不适合或不支持特定交易所需的功能; 或按照预定的阶段。 提供PhTM的系统可以被配置为从第一事务存储器模式转换到第二事务存储器模式，同时确保以第一事务存储器模式执行的事务不干扰第二事务存储器模式中的事务的正确执行。 该系统可以被配置为在转换到新模式之前中止正在进行的事务或等待事务完成，被中止或达到安全转换点，并且可以在协调转换中使用全局模式指示符。

公开(公告)号：US07346747B1

公开(公告)日：2008-03-18

申请号：US11078120

申请日：2005-03-11

申请人： Daniel S. Nussbaum ,  Mark S. Moir ,  Nir N. Shavit ,  Guy L. Steele

发明人： Daniel S. Nussbaum ,  Mark S. Moir ,  Nir N. Shavit ,  Guy L. Steele

IPC分类号： G06F12/00

CPC分类号： G06F12/0815

摘要： A computer system uses transient blocking synchronization for performing operations on shared memory. When performing operations on more than one memory location, the computer system obtains transient exclusive access to a first memory location. The computer system then obtains transient exclusive access to a second memory location, where the transient exclusive access to the second memory location does not expire prior to an expiration of the transient exclusive access to the first memory location or until explicitly unleased.

摘要翻译： 计算机系统使用瞬态阻塞同步来对共享存储器执行操作。 当在多个存储器位置上执行操作时，计算机系统获得对第一存储器位置的瞬时独占访问。 计算机系统然后获得对第二存储器位置的瞬时独占访问，其中对第二存储器位置的瞬时独占访问在到对第一存储器位置的瞬时独占访问期满之前直到明确地未被释放为止。

公开(公告)号：US20110246725A1

公开(公告)日：2011-10-06

申请号：US12750908

申请日：2010-03-31

申请人： Mark S. Moir ,  Yosef Lev ,  Daniel S. Nussbaum

发明人： Mark S. Moir ,  Yosef Lev ,  Daniel S. Nussbaum

IPC分类号： G06F12/00 ,  G06F9/46 ,  G06F12/16

CPC分类号： G06F11/141 ,  G06F9/467

摘要： The system and methods described herein may exploit hardware transactional memory to improve the performance of a software or hybrid transactional memory implementation, even when an entire user transaction cannot be executed within a hardware transaction. The user code of an atomic transaction may be executed within a software transaction, which may collect read and write sets and/or other information about the atomic transaction. A single hardware transaction may be used to commit the atomic transaction by validating the transaction's read set and applying the effects of the user code to memory, reducing the overhead associated with commitment of software transactions. Because the hardware transaction code is carefully controlled, it may be less likely to fail to commit. Various remedial actions may be taken before retrying hardware transactions following some failures. If a transaction exceeds the constraints of the hardware, it may be committed by the software transactional memory alone.

摘要翻译： 本文描述的系统和方法可以利用硬件事务存储器来改善软件或混合事务性存储器实现的性能，即使在硬件事务中不能执行整个用户事务。 原子事务的用户代码可以在软件事务中执行，其可以收集关于原子事务的读取和写入集合和/或其他信息。 可以使用单个硬件事务来通过验证事务的读取集合并将用户代码的效果应用于存储器来提交原子事务，从而减少与承诺的软件事务相关的开销。 由于硬件事务代码被严格控制，所以可能不太可能无法提交。 在出现某些故障之后重试硬件事务之前，可能会采取各种补救措施。 如果事务超出了硬件的限制，则可能仅由软件事务内存提交。

公开(公告)号：US20100333093A1

公开(公告)日：2010-12-30

申请号：US12493447

申请日：2009-06-29

申请人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

发明人： Daniel S. Nussbaum ,  David Dice ,  Martin Karlsson ,  Mark S. Moir

IPC分类号： G06F9/46 ,  G06F12/08

CPC分类号： G06F9/30087 ,  G06F9/3842 ,  G06F9/3865 ,  G06F12/0817

摘要： One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a misspeculation indicator of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides the recorded misspeculation indicator to the program to facilitate a response to the transaction failure by the program.

摘要翻译： 一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。 在操作期间，系统使用硬件事务存储器机制在执行事务期间记录事务的错误指示符。 接下来，系统检测与事务相关联的事务失败。 最后，系统向程序提供记录的错误指示符，以便程序响应交易失败。