MULTISIDED SHARING OF DYNAMIC DATA IN A WIRELESS TEST ENVIRONMENT
    1.
    发明申请
    MULTISIDED SHARING OF DYNAMIC DATA IN A WIRELESS TEST ENVIRONMENT 有权
    动态数据在无线测试环境中的多重共享

    公开(公告)号:US20070032991A1

    公开(公告)日:2007-02-08

    申请号:US11195979

    申请日:2005-08-03

    IPC分类号: G06F15/00

    CPC分类号: H04L67/06 H04L43/50

    摘要: Methods, devices and systems for sharing or transferring dynamically-generated data between or among multi-sided test components in a wireless environment are described. Multiple flows are initiated substantially simultaneously. Dynamically generated data are shared between or among agents using dynamic data content servlets that employ open communication standards or protocols, such as HTTP or HTTPS.

    摘要翻译: 描述了用于在无线环境中在多方面测试组件之间或之间共享或传送动态生成的数据的方法,设备和系统。 基本上同时启动多个流。 动态生成的数据在使用动态数据内容小服务器的代理之间或之间共享,这些servlet采用开放通信标准或协议,如HTTP或HTTPS。

    System for and method of multi-location test execution
    2.
    发明申请
    System for and method of multi-location test execution 有权
    多位置测试执行系统和方法

    公开(公告)号:US20070033441A1

    公开(公告)日:2007-02-08

    申请号:US11264896

    申请日:2005-11-01

    IPC分类号: G06F11/00

    CPC分类号: G06F11/36

    摘要: Methods, systems and computer program products for performing multi-location execution of tests between or among multi-sided test components in a wireless environment are described. Multiple flows are initiated substantially simultaneously and concurrently executed. A graphical representation of a multi-flow test is created that permits synchronization of the flows among agents at multiple remote locations. The graphical representation is converted into a textual representation in an open communication standard format, and information regarding each flow involved in the test is ascertained. The flows are substantially simultaneously initiated and concurrently executed with synchronization and dynamic data exchange components.

    摘要翻译: 描述了用于在无线环境中执行多方面测试组件之间或之间的测试的多位置执行的方法,系统和计算机程序产品。 基本同时并发执行多个流。 创建多流测试的图形表示,其允许在多个远程位置处的代理之间的流的同步。 图形表示以开放的通信标准格式转换为文本表示,并且确定关于测试中涉及的每个流的信息。 基本上同时启动流并且同步和动态数据交换组件执行流。

    Multisided synchronization of execution in a wireless test environment
    3.
    发明申请
    Multisided synchronization of execution in a wireless test environment 有权
    在无线测试环境中执行的多方面同步

    公开(公告)号:US20070032253A1

    公开(公告)日:2007-02-08

    申请号:US11195978

    申请日:2005-08-03

    IPC分类号: H04B15/00

    摘要: Methods, devices and systems for synchronizing the execution of tests between or among multi-sided test components in a wireless environment are described. Multiple flows are initiated substantially simultaneously. Execution is then paused in at least one of the flows. The paused flow sends a request for permission to resume execution to a sync servlet. The sync servlet does not respond affirmatively to the request until an appropriate synchronization signal is received from an unpaused flow, and then only after a desired test component in the unpaused flow has been executed. The paused flow is resumed upon receiving the appropriate synchronization signal from the sync servlet.

    摘要翻译: 描述用于在无线环境中在多方面测试组件之间或之间同步测试执行的方法,设备和系统。 基本上同时启动多个流。 至少一个流程中的执行暂停。 暂停的流程发送请求以允许恢复执行到同步servlet。 同步小服务程序不会对请求作出肯定的响应,直到从未启动的流程接收到适当的同步信号,然后才在执行未启动的流程中的所需测试组件之后。 从同步小服务器接收到适当的同步信号后,恢复暂停的流程。

    Integrated full-wave rectifier circuit
    4.
    发明授权
    Integrated full-wave rectifier circuit 失效
    集成全波整流电路

    公开(公告)号:US4777580A

    公开(公告)日:1988-10-11

    申请号:US920891

    申请日:1986-10-16

    申请人: David Bingham

    发明人: David Bingham

    IPC分类号: H01L27/08 H02M7/219 H02M7/217

    摘要: A full-wave rectifier circuit is disclosed having two AC input terminals each having connected to it the anode end of a diode equivalent device. The cathode ends of each of the diode equivalent devices are connected together to a positive DC output terminal. Each AC input terminal also has connected to it one end of a switching device. The other ends of each of the switching devices are connected together to a negative DC output terminal. The control means of the switching devices are connected such that only one conducts during any AC half cycle to provide a return path from the negative DC output terminal to the proper one of the two AC input terminals.

    摘要翻译: 公开了一种全波整流电路,其具有两个AC输入端子,每个交流输入端子连接到二极管等效装置的阳极端。 每个二极管等效器件的阴极端子连接在一起为正直流输出端子。 每个交流输入端子也连接到开关器件的一端。 每个开关装置的另一端连接在一起成负的直流输出端子。 连接开关装置的控制装置,使得在任何AC半周期期间只有一个导通以提供从负DC输出端子到两个AC输入端子中适当的一个的返回路径。

    Integrated dual charge pump power supply and RS-232 transmitter/receiver

    公开(公告)号:US4679134A

    公开(公告)日:1987-07-07

    申请号:US878233

    申请日:1986-06-25

    IPC分类号: H01L27/092 H02M3/07 H02M3/18

    摘要: A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period. A dual-collector lateral junction transistor, formed during the conventional CMOS processing steps used to fabricate the MOS switches, is connected as a voltage clamp between a ground potential and the two bipolar DC output lines of the power supply circuit to assure correct start-up conditions for the circuit. Gain reduction devices are placed in the semiconductor substrate to collect minority carriers which would otherwise be injected into inherent parasitic four layer PNPN junction devices created as a result of the architecture of the circuit, to prevent latch-up of the four layer devices. In a preferred embodiment, an RS-232 receiver and transmitter are contained on the same monolithic integrated circuit as the dual charge pump power supply.

    Integrated dual charge pump power supply and RS-232 transmitter/receiver

    公开(公告)号:US4636930A

    公开(公告)日:1987-01-13

    申请号:US782953

    申请日:1985-10-01

    IPC分类号: H01L27/092 H02M3/07 H02M7/25

    摘要: A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period. A dual-collector lateral junction transistor, formed during the conventional CMOS processing steps used to fabricate the MOS switches, is connected as a voltage clamp between a ground potential and the two bipolar DC output lines of the power supply circuit to assure correct start-up conditions for the circuit. Gain reduction devices are placed in the semiconductor substrate to collect minority carriers which would otherwise be injected into inherent parasitic four layer PNPN junction devices created as a result of the architecture of the circuit, to prevent latch-up of the four layer devices. In a preferred embodiment, an RS-232 receiver and transmitter are contained on the same monolithic integrated circuit as the dual charge pump power supply.

    Sequential coordination of test execution and dynamic data
    7.
    发明申请
    Sequential coordination of test execution and dynamic data 有权
    测试执行和动态数据的顺序协调

    公开(公告)号:US20050137842A1

    公开(公告)日:2005-06-23

    申请号:US10736835

    申请日:2003-12-17

    申请人: David Bingham

    发明人: David Bingham

    IPC分类号: G06F9/44 G06F11/273 G06F13/10

    CPC分类号: G06F11/2294

    摘要: An apparatus having: an agent; and a first test session servlet running on the agent, receiving a test description in a predetermined format from a caller, threading a first test session that invokes the agent to run the at least one subtest. The test description has at least one predefined subtest, dynamic data, and predefined test parameters. The first test session servlet receives test results from the first test session, and sends the subtest results from the at least one subtest and the dynamic data back to the caller.

    摘要翻译: 具有:代理人的装置; 以及在所述代理上运行的第一测试会话小服务器,从呼叫者接收预定格式的测试描述,穿过调用所述代理运行所述至少一个子测试的第一测试会话。 测试描述具有至少一个预定义的子测验,动态数据和预定义的测试参数。 第一个测试会话servlet从第一个测试会话接收测试结果,并将来自至少一个子测试的子测试结果和动态数据发回给调用者。

    Single output transistor output stage for interface applications
    8.
    发明授权
    Single output transistor output stage for interface applications 失效
    用于接口应用的单输出晶体管输出级

    公开(公告)号:US5988819A

    公开(公告)日:1999-11-23

    申请号:US24859

    申请日:1998-02-17

    IPC分类号: H03K19/003 G05F1/10

    CPC分类号: H03K19/00315

    摘要: An interface output stage includes a pull-up circuit and a pull-down circuit connected to a positive power supply signal line having a first voltage, an output signal line having an output voltage and a negative power supply signal line having a second voltage. The pull-up circuit includes a single output transistor and a body snatcher circuit, both interconnected between the positive power supply signal line and the output signal line. The body snatcher circuit ties the bodies of the output transistor and the transistors forming the body snatcher circuit to either the first voltage or the output voltage. The pull-down circuit is designed generally similar to the pull-up circuit to tie bodies of its transistors to either the output voltage or the second voltage.

    摘要翻译: 接口输出级包括上拉电路和连接到具有第一电压的正电源信号线,具有输出电压的输出信号线和具有第二电压的负电源信号线的下拉电路。 上拉电路包括在正电源信号线和输出信号线之间互连的单个输出晶体管和主体捕获电路。 身体拾取器电路将输出晶体管的主体和形成主体捕获电路的晶体管连接到第一电压或输出电压。 下拉电路的设计大体类似于将其晶体管的主体连接到输出电压或第二电压的上拉电路。

    Reverse current prevention method and apparatus and reverse current
guarded low dropout circuits
    9.
    发明授权
    Reverse current prevention method and apparatus and reverse current guarded low dropout circuits 失效
    反向电流预防方法和装置以及反向电流保护的低压差电路

    公开(公告)号:US5594381A

    公开(公告)日:1997-01-14

    申请号:US235688

    申请日:1994-04-29

    申请人: David Bingham

    发明人: David Bingham

    IPC分类号: G01R19/165 H03K3/01

    摘要: A reverse current limited circuit configured to provide a reverse current limited low dropout voltage output. The reverse current limited circuit, coupled between a pair of terminals, comprises (i) a MOS pass transistor coupled in series between the first and second terminals, (ii) connection circuitry to connect the substrate of the MOS pass transistor to either one of the pair of terminals based on the relative magnitudes of the voltages measured on the pair of terminals, (iii) activation circuitry for turning on and off the MOS pass transistor based on the relative magnitudes of the voltages measured on the pair of terminals and (iv) comparison circuitry used to compare the voltages of the pair of terminals and to control the activation circuitry and the connection circuitry in response to the comparison made.

    摘要翻译: 反向电流限制电路,被配置为提供反向电流限制的低压差电压输出。 耦合在一对端子之间的反向电流限制电路包括:(i)串联耦合在第一和第二端子之间的MOS通过晶体管,(ii)连接电路,用于将MOS通过晶体管的衬底连接到 基于在所述一对端子上测量的电压的相对大小的一对端子,(iii)基于在所述一对端子上测量的电压的相对幅度来导通和关断所述MOS通过晶体管的激活电路,以及(iv) 比较电路用于比较一对终端的电压,并响应于进行比较来控制激活电路和连接电路。

    Integrated dual charge pump power supply and RS-232 transmitter/receiver
    10.
    发明授权
    Integrated dual charge pump power supply and RS-232 transmitter/receiver 失效
    集成双电荷泵电源和RS-232发射器/接收器

    公开(公告)号:US4777577A

    公开(公告)日:1988-10-11

    申请号:US117992

    申请日:1987-11-09

    IPC分类号: H01L27/092 H02M3/07 H02M7/25

    摘要: A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period. A dual-collector lateral junction transistor, formed during the conventional CMOS processing steps used to fabricate the MOS switches, is connected as voltage clamp between a ground potential and the two bipolar DC output lines of the power supply circuit to assure correct start-up conditions for the conduit. Gain reduction devices are placed in the semiconductor substrate to collect minority carriers which would otherwise be injected into inherent parasitic four layer PNPN junction devices created as a result of the architecture of the circuit, to prevent latch-up of the four layer devices. In a preferred embodiment, an RS-232 receiver and transmitter are contained on the same monolithic integrated circuit as the dual charge pump power supply.

    摘要翻译: 公开了一种包含反相/非反相倍压器电荷泵电路的单片集成电路,用于将单极电源电压转换为更大幅度的双极电源电压。 在第一时间段期间,单极输入电压由第一组MOS开关置于第一外部转移电容器之间。 单极输入电压源与第一传输电容器串联布置,并且在第二时间段期间,第二组MOS开关将该串联组合的电压放置在第一外部存储器电容器之间。 跨越第一外部储存电容器出现的电压在第一时间周期期间被第三组MOS开关置于第二转移电容器上。 在第二时间段期间,第二转移电容器两端的电压被放置在第二外部储存电容器中,其极性被第四组MOS开关反转。 在用于制造MOS开关的常规CMOS处理步骤期间形成的双集电极横向结结晶体管作为电压钳位在电源电路的地电位和两个双极直流输出线之间连接,以确保正确的启动条件 为管道。 增益减小装置放置在半导体衬底中以收集少数载流子,否则这些载流子将被注入到作为电路架构的结果而产生的固有寄生四层PNPN结器件中,以防止四层器件的锁存。 在优选实施例中,RS-232接收器和发射器包含在与双电荷泵电源相同的单片集成电路上。