摘要:
Disclosed is a device to convert a piece of motion information into a motion information signal at the field rate and with the number of lines desired for a high-definition television receiver. This device comprises:at least two memories for the storage, at the field rate of the input video signal, of respectively pieces of data pertaining to the information on motion of the even fields and pieces of data pertaining to the information on motion of the odd fields, these memories being read at the field rate of the video signal to be displayed, anda processing circuit connected to the output of the memories, said circuit delivering, from motion information read at the desired field rate, a motion information signal, at the field rate and with the number of lines desired, that is synchronous with the video signal to be displayed.
摘要:
A method prepares a computer program for operation in a computer supply system that supplies portions, or program units, of program code or program data of the computer program as the program needs the portions. The method includes defining a program unit of the program and removing the program unit from the program, thereby producing a program skeleton that is missing the program unit. The method further includes inserting instructions in place of the program unit in the program skeleton. The instructions are operative to request the program unit when the program skeleton encounters the instructions. An information structure includes a program skeleton of a program. The program skeleton is missing a funclet of the program, but includes a placeholder in place of the funclet. The program skeleton additionally includes instructions in place of the funclet. The instructions are operative to request the funclet when the program skeleton encounters the instructions.
摘要:
When processing a digital video signal, the problem often arises of converting the signal from a first sampling raster which is asynchronous with respect to the line interval to a second sampling raster which synchronous with the line interval. Interpolation filters are used for this purpose. The present invention provide a simple method for the conversion which does not require intermediate D/A or A/D conversion. For each line of the input signal, the phase of samples of the first sampling raster relative to the line synchronization pulse and the total number of the samples for this line are determined and are used to control of the interpolation filter.
摘要:
A data compander for digital video signals wherein the sampling frequency is locked to the chrominance-subcarrier frequency. The data compander includes the following cascaded subcircuits: a lock-mode-changing filter which changes the lock of the video signals with the chrominance subcarrier into signals whose clock frequency is locked to the line frequency; an (a/b)-decimation filter, where a, b are integers, and a is less than b; a first peaking filter; a utilization circuit for the line-locked signals; a (b/a)-interpolation filter; a lock-mode-reversing filter which changes the lock of the signals with the line frequency; and a second peaking filter.
摘要:
Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.
摘要:
A control circuit includes a data reduction decoder and an interpolating filter, the data reduction decoder having an line memory for the video signal included in a scanning line. The interpolating filter cooperates with the line memory and includes a first adder, a subtracter, a first and a second multiplier, and a second adder. The control circuit controls the writing of digital signals of a field corresponding to any of the conventional television standards into a memory array and the readout of digital signals at an increased field rate, preferably at twice the field rate.
摘要:
A method prepares a computer program for operation in a computer supply system that supplies portions, or program units, of program code or program data of the computer program as the program needs the portions. The method includes defining a program unit of the program and removing the program unit from the program, thereby producing a program skeleton that is missing the program unit. The method further includes inserting instructions in place of the program unit in the program skeleton. The instructions are operative to request the program unit when the program skeleton encounters the instructions. An information structure includes a program skeleton of a program. The program skeleton is missing a funclet of the program, but includes a placeholder in place of the funclet. The program skeleton additionally includes instructions in place of the funclet. The instructions are operative to request the funclet when the program skeleton encounters the instructions.
摘要:
A method prepares a computer program for operation in a computer supply system that supplies portions, or program units, of program code or program data of the computer program as the program needs the portions. The method includes defining a program unit of the program and removing the program unit from the program, thereby producing a program skeleton that is missing the program unit. The method further includes inserting instructions in place of the program unit in the program skeleton. The instructions are operative to request the program unit when the program skeleton encounters the instructions. An information structure includes a program skeleton of a program. The program skeleton is missing a funclet of the program, but includes a placeholder in place of the funclet. The program skeleton additionally includes instructions in place of the funclet. The instructions are operative to request the funclet when the program skeleton encounters the instructions.
摘要:
A method of supplying program units of a computer program as the program needs the program units includes running a program skeleton. The program skeleton is derived from the program, but has a program stub where a program unit associated with the program stub may be inserted. Upon encountering the program stub, the method includes getting the program unit associated with the program stub and inserting the program unit at the program stub. A method of supplying funclets of a computer program from a server computer system to a client computer system includes receiving a plurality of requests for funclets during a test period. If a tested probability of requests for a first funclet being followed by requests for a second funclet is at least a predetermined probability, then the method also includes sending the first funclet and the second funclet to the client computer system in response to a request from the client computer system for the first funclet after the test period.
摘要:
Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.