Abstract:
An operational amplifier of the type which includes first and second differentially coupled input transistors which cooperate with a current mirror circuit also includes a first and second RTMM resistors which may be individually trimmed to reduce input offset voltage. Each RTMM resistor is coupled from the power supply rail through first and second diodes respectively to the first and second input terminals. In this manner, signals appearing on the input terminals which exceed the rail voltage will cause currents to flow through the RTMM resistors thus reducing their resistance, and reducing offset voltage.
Abstract:
An operational amplifier includes a pair of differentially coupled PNP transistors driving a current mirror circuit. The base of the each of the transistors is coupled to the source of a JFET follower transistor each of which in turn has a gate coupled to one of the amplifier's inputs. First and second current sources are coupled to the source electrodes of each of the JFETs for the purpose of supplying a current thereto equal to that JFET's I.sub.DSS (its drain current when its gate and source are shorted).
Abstract:
A modification circuit (30) is thermally coupled to and electrically isolated from a circuit element (20) of a utilization circuit (10). During modification, current pulses are passed through an isolation circuit (40) to the modification circuit which heats the circuit element, e.g., a resistor, of the utilization circuit substantially above the normal operating temperature range of the element, thereby modifying the electrical characteristics of the resistor and therefore those of the utilization circuit to which it is connected. During normal operation of the utilization circuit the circuit element of the utilization circuit is electrically isolated from the modification circuit.
Abstract:
First and second resistors of a resistive network formed in a semiconductive substrate may be individually trimmed. The first and second resistive regions coupled at one end thereof have their other ends provided with metallic contacts. The resistive regions are disposed on the substrate such that current flowing from the first metallic contact to the second metallic contact through the first and second resistive regions causes the resistance of the first resistive region to be preferentially reduced. In contrast, current flowing from the second metallic contact to the first metallic contact through the first and second resistive regions causes the resistance of the second resistive region to be preferentially reduced. The resistive network is used in an operational amplifier circuit so as to permit the input offset voltage to be substantially reduced by selective trimming.
Abstract:
An improved field effect transistor follower circuit includes a transistor having equivalent input capacitance C.sub..pi. and a field-effect-transistor which has a gate electrode coupled to a source of an input signal, a drain coupled to a source of supply voltage, and a source coupled to the base of the transistor. A feed forward capacitor is provided and coupled between the gate and source electrodes of the field effect transistor. An operational amplifier is also disclosed which utilizes junction field-effect-transistor followers including feed forward capacitors.
Abstract:
In an output stage of an operational amplifier comprising first and second NPN output transistors a circuit is coupled between the positive supply conductor and the collector of the first NPN transistor for providing a boosted base current drive thereto as a function of the load current sourced from the emitter of the first transistor to the output of the operational amplifier. The circuit senses the collector current flowing through the first transistor for increasing the base current drive thereto as the collector current increases.
Abstract:
A circuit for generating a reference current proportional over temperature to the pinch-off voltage of a first JFET includes second and third JFETS and first and second resistors. The second JFET has its gate coupled to its source and produces a current which drives the first JFET. Since the width-to-length ratio of the second JFET is greater than that of the first, a negative gate-to-source voltage of the first JFET is produced across the first resistor. The third JFET has a source coupled via the second resistor to the gate of the first JFET and has a gate coupled to the drain of the first JFET for setting the voltage thereat. The reference current appears at the drain of the third JFET.
Abstract:
A data transmitter (12) on a data bus (16) keeps its drive transistor (36) at a minimum bias according to the minimum voltage level on the data bus. The current flowing through the drive transistor in response to a data signal, or a proportional current, is mirrored (52, 54) and compared to a current source (60). Any mismatched between the mirrored current and the current source enables a transistor (58) to bias the drive transistor so that it maintains a minimum conduction state. The base of the drive transistor is held one V.sub.be above the minimum voltage on the data bus. The minimum bias on the base of the drive transistor keeps it conducting so that the transition to full conduction is smooth and prevents any sharp transitions that may cause undesired radiated emissions.
Abstract:
A lateral transistor (14) is configured as a reverse protection diode that allows low and high current modes of operation while maintaining low forward voltage drop. The base region (38) of the lateral transistor is formed inside a collector ring (34) and adjacent to the emitter region (36). In low current mode, the transistor operates as a conventional diode. In high current mode, the excessive number of minority carriers injected into the base region causes the device to enter conductivity modulation that effectively increases the doping concentration and lowers the bulk resistance. The lower bulk resistance keeps the forward voltage drop low. By having the base region inside the collector ring, the bulk resistance is kept low to aid in the onset of conductivity modulation. Thus, the transition between low current mode and high current mode is minimized.
Abstract:
A resistance measuring circuit (10) generates a predetermined reference voltage and impresses that reference voltage across a squib detonation device (12). The resulting current flowing through the squib is mirrored by a current mirror (42,52,54) for providing multiple mirrored currents. The mirrored currents are compared to known current sources (58,60). The output signals go high or low depending on whether the mirrored currents are greater than or less than the fixed current sources. The output signals provide an indication as to whether the measured squib resistance is within a specified resistance range. The current sources may be precisely matched to maintain high accuracy in measuring the resistance.