Hybrid orientation accumulation mode GAA CMOSFET
    1.
    发明授权
    Hybrid orientation accumulation mode GAA CMOSFET 失效
    混合定向累加模式GAA CMOSFET

    公开(公告)号:US08264042B2

    公开(公告)日:2012-09-11

    申请号:US12810574

    申请日:2010-02-11

    IPC分类号: H01L27/12

    摘要: A hybrid orientation accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Si(110) and n-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device results in high carrier mobility. Meanwhile polysilicon gate depletion and short channel effects are prevented, and threshold voltage is increased.

    摘要翻译: 混合取向累积模式GAA(Gate-All-Around)CMOSFET包括具有第一通道的PMOS区域,具有第二通道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Si(110)和n型Si(100)形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 根据本发明的装置结构相当简单,紧凑且高度集成。 在积累模式中,电流流过整个跑道状通道。 所公开的装置导致高载流子迁移率。 同时防止多晶硅栅极耗尽和短沟道效应,并且阈值电压增加。

    HYBRID ORIENTATION ACCUMULATION MODE GAA CMOSFET
    2.
    发明申请
    HYBRID ORIENTATION ACCUMULATION MODE GAA CMOSFET 失效
    混合方向累积模式GAA CMOSFET

    公开(公告)号:US20110254013A1

    公开(公告)日:2011-10-20

    申请号:US12810574

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A hybrid orientation accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Si(110) and n-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device results in high carrier mobility. Meanwhile polysilicon gate depletion and short channel effects are prevented, and threshold voltage is increased.

    摘要翻译: 混合取向累积模式GAA(Gate-All-Around)CMOSFET包括具有第一通道的PMOS区域,具有第二通道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Si(110)和n型Si(100)形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 根据本发明的装置结构相当简单,紧凑且高度集成。 在积累模式中,电流流过整个跑道状通道。 所公开的装置导致高载流子迁移率。 同时防止多晶硅栅极耗尽和短沟道效应,并且阈值电压增加。

    HYBRID MATERIAL ACCUMULATION MODE GAA CMOSFET
    3.
    发明申请
    HYBRID MATERIAL ACCUMULATION MODE GAA CMOSFET 失效
    混合材料累积模式GAA CMOSFET

    公开(公告)号:US20110254100A1

    公开(公告)日:2011-10-20

    申请号:US12810648

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A Ge and Si hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Ge and n-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device has high carrier mobility, high device drive current, and maintains the electrical integrity of the device. Meanwhile, polysilicon gate depletion and short channel effects are prevented.

    摘要翻译: Ge和Si混合材料堆积模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Ge和n型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在积累模式中,电流流过整个跑道状通道。 所公开的器件具有高的载流子迁移率,高的器件驱动电流,并且保持器件的电气完整性。 同时,防止了多晶硅栅极耗尽和短沟道效应。

    Hybrid material inversion mode GAA CMOSFET
    4.
    发明授权
    Hybrid material inversion mode GAA CMOSFET 有权
    混合材料反演模式GAA CMOSFET

    公开(公告)号:US08350298B2

    公开(公告)日:2013-01-08

    申请号:US12810619

    申请日:2010-02-11

    摘要: A Ge and Si hybrid material inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of n-type Ge and p-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an inversion mode, the devices have hybrid material, GAA structure with the racetrack-shaped, high-k gate dielectric layer and metal gate, so as to achieve high carrier mobility, prevent polysilicon gate depletion and short channel effects.

    摘要翻译: Ge和Si混合材料反转模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由n型Ge和p型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在反相模式下,器件具有混合材料,GAA结构,具有跑道形,高k栅介质层和金属栅极,从而实现高载流子迁移率,防止多晶硅栅极耗尽和短沟道效应。

    HYBRID MATERIAL INVERSION MODE GAA CMOSFET
    5.
    发明申请
    HYBRID MATERIAL INVERSION MODE GAA CMOSFET 有权
    混合材料反相模式GAA CMOSFET

    公开(公告)号:US20110248354A1

    公开(公告)日:2011-10-13

    申请号:US12810619

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A Ge and Si hybrid material inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of n-type Ge and p-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an inversion mode, the devices have hybrid material, GAA structure with the racetrack-shaped, high-k gate dielectric layer and metal gate, so as to achieve high carrier mobility, prevent polysilicon gate depletion and short channel effects.

    摘要翻译: Ge和Si混合材料反转模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由n型Ge和p型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在反相模式下,器件具有混合材料,GAA结构,具有跑道形,高k栅介质层和金属栅极,从而实现高载流子迁移率,防止多晶硅栅极耗尽和短沟道效应。

    Hybrid orientation inversion mode GAA CMOSFET
    6.
    发明授权
    Hybrid orientation inversion mode GAA CMOSFET 失效
    混合方向反演模式GAA CMOSFET

    公开(公告)号:US08330229B2

    公开(公告)日:2012-12-11

    申请号:US12810740

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A hybrid orientation inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of n-type Si (110) and p-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an inversion mode, the devices have different orientation channels, the GAA structure with the racetrack-shaped, high-k gate dielectric layer and metal gate, so as to achieve high carrier mobility, and prevent polysilicon gate depletion and short channel effects.

    摘要翻译: 混合取向反转模式GAA(Gate-All-Around)CMOSFET包括具有第一通道的PMOS区域,具有第二通道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由n型Si(110)和p型Si(100)形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 根据本发明的装置结构相当简单,紧凑且高度集成。 在反转模式中,器件具有不同的取向通道,GAA结构具有跑道形,高k栅介质层和金属栅极,从而实现高载流子迁移率,并防止多晶硅栅极耗尽和短沟道效应。

    Hybrid material inversion mode GAA CMOSFET
    7.
    发明授权
    Hybrid material inversion mode GAA CMOSFET 失效
    混合材料反演模式GAA CMOSFET

    公开(公告)号:US08330228B2

    公开(公告)日:2012-12-11

    申请号:US12810694

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A Ge and Si hybrid material inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a circular-shaped cross section and are formed of n-type Ge and p-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an inversion mode, current flows through the overall cylindrical channel, so as to achieve high carrier mobility, reduce low-frequency noises, prevent polysilicon gate depletion and short channel effects and increase the threshold voltage of the device.

    摘要翻译: Ge和Si混合材料反转模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有圆形截面并分别由n型Ge和p型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在反相模式下,电流流过整个圆柱形通道,以实现高载流子迁移率,降低低频噪声,防止多晶硅栅极耗尽和短沟道效应,并增加器件的阈值电压。

    HYBRID MATERIAL INVERSION MODE GAA CMOSFET
    8.
    发明申请
    HYBRID MATERIAL INVERSION MODE GAA CMOSFET 失效
    混合材料反相模式GAA CMOSFET

    公开(公告)号:US20110254101A1

    公开(公告)日:2011-10-20

    申请号:US12810694

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A Ge and Si hybrid material inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a circular-shaped cross section and are formed of n-type Ge and p-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an inversion mode, current flows through the overall cylindrical channel, so as to achieve high carrier mobility, reduce low-frequency noises, prevent polysilicon gate depletion and short channel effects and increase the threshold voltage of the device.

    摘要翻译: Ge和Si混合材料反转模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有圆形截面并分别由n型Ge和p型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在反相模式下,电流流过整个圆柱形通道,以实现高载流子迁移率,降低低频噪声,防止多晶硅栅极耗尽和短沟道效应,并增加器件的阈值电压。

    Hybrid material accumulation mode GAA CMOSFET
    9.
    发明授权
    Hybrid material accumulation mode GAA CMOSFET 失效
    混合材料堆积模式GAA CMOSFET

    公开(公告)号:US08274119B2

    公开(公告)日:2012-09-25

    申请号:US12810648

    申请日:2010-02-11

    IPC分类号: H01L21/70

    摘要: A Ge and Si hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of p-type Ge and n-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an accumulation mode, current flows through the overall racetrack-shaped channel. The disclosed device has high carrier mobility, high device drive current, and maintains the electrical integrity of the device. Meanwhile, polysilicon gate depletion and short channel effects are prevented.

    摘要翻译: Ge和Si混合材料堆积模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由p型Ge和n型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在积累模式中,电流流过整个跑道状通道。 所公开的器件具有高的载流子迁移率,高的器件驱动电流,并且保持器件的电气完整性。 同时,防止了多晶硅栅极耗尽和短沟道效应。

    Hybrid material accumulation mode GAA CMOSFET
    10.
    发明授权
    Hybrid material accumulation mode GAA CMOSFET 失效
    混合材料堆积模式GAA CMOSFET

    公开(公告)号:US08274118B2

    公开(公告)日:2012-09-25

    申请号:US12810594

    申请日:2010-02-11

    IPC分类号: H01L21/70

    摘要: A Ge and Si hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a circular-shaped cross section and are formed of p-type Ge and n-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an accumulation mode, current flows through the overall cylindrical channel, so as to achieve high carrier mobility, reduce low-frequency noises, prevent polysilicon gate depletion and short channel effects and increase the threshold voltage of the device.

    摘要翻译: Ge和Si混合材料堆积模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有圆形截面并分别由p型Ge和n型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在累积模式下,电流流过整个圆柱形通道,以实现高载流子迁移率,降低低频噪声,防止多晶硅栅极耗尽和短沟道效应,并增加器件的阈值电压。