SEMICONDUCTOR NONVOLATILE MEMORY DEVICE
    1.
    发明申请
    SEMICONDUCTOR NONVOLATILE MEMORY DEVICE 有权
    半导体非易失性存储器件

    公开(公告)号:US20090014775A1

    公开(公告)日:2009-01-15

    申请号:US12233670

    申请日:2008-09-19

    IPC分类号: H01L29/00

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅极结构的半导体非易失性存储器件中进行热空穴注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS FABRICATION METHOD
    2.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS FABRICATION METHOD 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US20070210371A1

    公开(公告)日:2007-09-13

    申请号:US11653832

    申请日:2007-01-17

    IPC分类号: H01L29/788

    摘要: A memory cell includes a selective gate and a memory gate arranged on one side surface of the selective gate. The memory gate includes one part formed on one side surface of the selective gate and the other part electrically isolated from the selective gate and a p-well through an ONO layer formed below the memory gate. A sidewall-shaped silicon oxide is formed on side surfaces of the selective gate, and a sidewall-shaped silicon dioxide layer and a silicon dioxide layer are formed on side surfaces of the memory gate. The ONO layer formed below the memory gate is terminated below the silicon oxide, and prevents generation of a low breakdown voltage region in the silicon oxide near an end of the memory gate during deposition of the silicon dioxide layer.

    摘要翻译: 存储单元包括布置在选择栅极的一个侧表面上的选择栅极和存储栅极。 存储器栅极包括形成在选择栅极的一个侧表面上的一个部分和与选择栅极电隔离的另一部分,以及通过形成在存储栅极下方的ONO层的p阱。 在选择栅极的侧面上形成侧壁状的氧化硅,在存储栅的侧面形成侧壁状的二氧化硅层和二氧化硅层。 形成在存储器栅下方的ONO层终止在氧化硅的下方,并且防止在沉积二氧化硅层期间在存储栅的端部附近的硅氧化物中产生低的击穿电压区域。

    Semiconductor nonvolatile memory device
    3.
    发明申请
    Semiconductor nonvolatile memory device 失效
    半导体非易失性存储器件

    公开(公告)号:US20070183206A1

    公开(公告)日:2007-08-09

    申请号:US11727592

    申请日:2007-03-27

    IPC分类号: G11C11/34 G11C16/04

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided. When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes. Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅极结构的半导体非易失性存储器件中进行热空穴注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。

    Semiconductor nonvolatile memory device
    4.
    发明授权
    Semiconductor nonvolatile memory device 有权
    半导体非易失性存储器件

    公开(公告)号:US08472258B2

    公开(公告)日:2013-06-25

    申请号:US13269425

    申请日:2011-10-07

    IPC分类号: G11C11/34 G11C16/04 G11C16/06

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅极结构的半导体非易失性存储器件中进行热空穴注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。

    Semiconductor nonvolatile memory device
    5.
    发明授权
    Semiconductor nonvolatile memory device 有权
    半导体非易失性存储器件

    公开(公告)号:US08064261B2

    公开(公告)日:2011-11-22

    申请号:US12787158

    申请日:2010-05-25

    IPC分类号: G11C11/34 G11C16/04 G11C16/06

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅结构的半导体非易失性存储器件中进行热孔注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。

    Semiconductor nonvolatile memory device
    6.
    发明授权
    Semiconductor nonvolatile memory device 有权
    半导体非易失性存储器件

    公开(公告)号:US07751255B2

    公开(公告)日:2010-07-06

    申请号:US12233670

    申请日:2008-09-19

    IPC分类号: G11C11/34 G11C16/04 G11C16/06

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅极结构的半导体非易失性存储器件中进行热空穴注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。

    Nonvolatile semiconductor memory device and its fabrication method
    7.
    发明授权
    Nonvolatile semiconductor memory device and its fabrication method 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US07259422B1

    公开(公告)日:2007-08-21

    申请号:US11653832

    申请日:2007-01-17

    IPC分类号: H01L29/788

    摘要: A memory cell includes a selective gate and a memory gate arranged on one side surface of the selective gate. The memory gate includes one part formed on one side surface of the selective gate and the other part electrically isolated from the selective gate and a p-well through an ONO layer formed below the memory gate. A sidewall-shaped silicon oxide is formed on side surfaces of the selective gate, and a sidewall-shaped silicon dioxide layer and a silicon dioxide layer are formed on side surfaces of the memory gate. The ONO layer formed below the memory gate is terminated below the silicon oxide, and prevents generation of a low breakdown voltage region in the silicon oxide near an end of the memory gate during deposition of the silicon dioxide layer.

    摘要翻译: 存储单元包括布置在选择栅极的一个侧表面上的选择栅极和存储栅极。 存储器栅极包括形成在选择栅极的一个侧表面上的一个部分和与选择栅极电隔离的另一部分,以及通过形成在存储栅极下方的ONO层的p阱。 在选择栅极的侧面上形成侧壁状的氧化硅,在存储栅的侧面形成侧壁状的二氧化硅层和二氧化硅层。 形成在存储器栅下方的ONO层终止在氧化硅的下方,并且防止在沉积二氧化硅层期间在存储栅的端部附近的硅氧化物中产生低的击穿电压区域。

    Semiconductor nonvolatile memory device
    10.
    发明授权
    Semiconductor nonvolatile memory device 失效
    半导体非易失性存储器件

    公开(公告)号:US07443731B2

    公开(公告)日:2008-10-28

    申请号:US11727592

    申请日:2007-03-27

    IPC分类号: G11C11/34 G11C16/04

    摘要: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

    摘要翻译: 提供一种稳定运行半导体非易失性存储器件的操作方案。 当在分裂栅极结构的半导体非易失性存储器件中进行热空穴注入时,使用不随时间变化的交叉点来验证热孔注入。 因此,可以验证擦除状态,而不知道任何时变变化。 此外,通过将多次脉冲电压或多级电压施加到栅极部分进行编程或编程/擦除。